sb0 changed the topic of #m-labs to: https://m-labs.hk :: Mattermost https://chat.m-labs.hk :: Logs http://irclog.whitequark.org/m-labs
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<whitequark> sb: you broke homu
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<sb0> whitequark: details
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<whitequark> sb: it doesn't test PRs anymore
<whitequark> no idea why, that hasn't happened before you touched it
<whitequark> how do i access logs?
<mtrbot-ml> [mattermost] <sb10q> how is the PR test request sent? it seems there are still some dns problems with ipv6
<mtrbot-ml> [mattermost] <sb10q> logs i am not sure. it prints a few things which you can see with journalctl, but there isn't much there
<mtrbot-ml> [mattermost] <sb10q> is there another log file it creates somewhere, or a flag to increase verbosity?
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<whitequark> sb: back when i was running it in tmux it would print a reasonable amount of logs on stdout
<whitequark> that's possibly what you're seeing
<whitequark> sb: i can't see anything via journalctl since i'm not in adm wheel or systemd-journa
<whitequark> of course nix went all in on systemd garbage, how disappointing
<mtrbot-ml> [mattermost] <sb10q> iirc there is a fork/overlay without systemd, but i have not bothered looking into it since systemd often does the job despite its poor architecture
<whitequark> well the old server also used systemd
<whitequark> but only for init
<whitequark> journalctl is even more trash than the rest of systemd
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<lkcl> <whitequark> signal = signal << 1 i use this trick all the time, for code clarity
<lkcl> usually not into the same python variable name
<lkcl> as a way to reduce the length of lines
<lkcl> and always, always, put it into an eq assignment into a Signal and/or use it in an m.If statement somewhere
<lkcl> ZirconiumX: v. important to respect and understand the difference between python variables and nmigen AST!
<lkcl> in MyHDL, there *is* no difference. python AST is *OVERLOADED* to *BECOME* HDL syntax / AST.
<lkcl> and they struggle to fit all of HDL concepts into python, unfortunately restricting developers to a *subset* of python in the process
<lkcl> hence why we picked nmigen.
<ZirconiumX> I mean, at the moment I can't do all that much with nmigen because Yosys has a bug
<whitequark> huh?
<whitequark> which bug? i'm not aware of any showstopper yosys bugs
<whitequark> ohh, interesting
<ZirconiumX> I'm not sure if I should be proud of my code being so bad that Yosys breaks on it :^)
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<ZirconiumX> Said showstopper yosys bug now has a fix from Clifford, praise be
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<sb0> whitequark: nothing in the log
<sb0> how do you trigger a problem? isn't it just the dns issue?
<whitequark> sb0: well i told it r+ and it didn't reply with anything
<whitequark> is the dns issue fixed?
<whitequark> yes
<whitequark> hm
<whitequark> yeah absolutely nothing happens
<sb0> ah, now it prints some error
<whitequark> it's a nix error, so fix it
<sb0> SSH_KEY_FILE = os.path.join(os.path.dirname(__file__), '../cache/key')
<sb0> that would have been on error on any other distro...
<whitequark> that's why it says use virtualenv
<whitequark> i don't mean it's nix-specific, i mean it's caused by nix migration
<whitequark> pretty shit design though
<sb0> do you know what this key file is for exactly? can I just set that to ~/cache/key?
<whitequark> no idea
<whitequark> it might be invoking ssh as a subprocess
<whitequark> through git perhaps
<sb0> init_local_git_cmds() in main.py also acceses this cache folder, this time simply as "cache" and not __file__/../cache/key ...
<sb0> what is the correct pwd for running this thing? root of its git repository/
<sb0> ?
<whitequark> yes
<sb0> okay, so in that case both would point to the same cache folder and this homu bug would be hidden
<sb0> patching the python source so it uses ~/cache should work
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<sb0> whitequark: try again
<sb0> ok wait
<sb0> it's retrying by itself on startup anyway
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<adamgreig> with https://github.com/m-labs/migen/pull/181 is the differential + expected to be connected to the A or B input?
<adamgreig> I seem to recall something like - on A and + on B and you pass B to the SB_IO to construct the differential I/O
<adamgreig> but it's all shockingly documented by lattice
<daveshah> I think it varies between parts
<daveshah> It's definitely + on A for up5k
<daveshah> and the SB_IO on A
<adamgreig> so the ice40 family datasheet does specifically say A=negative B=positive
<daveshah> Yes, conversely the up5k pinout sheet has the a pins as "true"
<daveshah> I think B is positive for HX/LP and A is positive for U/UL/UP
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<adamgreig> typical :p
<adamgreig> yea, just checked some old code and you defo pass the B to SB_IO on iCE40
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