sb0 changed the topic of #m-labs to: ARTIQ, Migen, MiSoC, Mixxeo & other M-Labs projects :: fka #milkymist :: Logs http://irclog.whitequark.org/m-labs
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<GitHub> [artiq] sbourdeauducq commented on pull request #699 d44d3b8: Even if this has no practical consequences here, I'd like to avoid touching global state when that can be avoided, which is why I was using ``random.Random`` in the original code. Your seeding code would break if there are two threads with different seeds executing this at the same time. https://github.com/m-labs/artiq/pull/699#discussion_r109075145
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<sb0> whitequark, what's the latest on DMA?
<sb0> https://hastebin.com/bujoqukima.py doesn't crash when I run it ...
<sb0> I have taken the record() out of the loop and added a print() into it
<sb0> how did you know it crashed at the third iteration?
<sb0> it does crash when I run it the *second* time, though
<sb0> I can run this whole experiment *once* after reloading the FPGA, then it crashes on subsequent attempts
<sb0> it also crashes if I move record_dma() into the loop
<sb0> it looks like changing the DMA base address is broken
<sb0> when it crashes, I can confirm this happens on the third iteration as you said
<sb0> whitequark, why did you set data min_length to 4 in the testbench, instead of 1?
<sb0> having 1-byte data should be supported everywhere
<GitHub> [artiq] sbourdeauducq pushed 1 new commit to master: https://github.com/m-labs/artiq/commit/200c49911458b531dd157dd91b0c797e5c65c252
<GitHub> artiq/master 200c499 Sebastien Bourdeauducq: test: change base address in DMA simulation testbench
<sb0> this doesn't show any bug though...
<sb0> I'm off to the lab soon, will try the freeze spray
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<bb-m-labs> build #491 of artiq-board is complete: Success [build successful] Build details are at http://buildbot.m-labs.hk/builders/artiq-board/builds/491
<bb-m-labs> build #1427 of artiq is complete: Failure [failed python_unittest_2] Build details are at http://buildbot.m-labs.hk/builders/artiq/builds/1427 blamelist: Sebastien Bourdeauducq <sb@m-labs.hk>
<GitHub> [artiq] sbourdeauducq created test_ci (+1 new commit): https://github.com/m-labs/artiq/commit/ae764a971717
<GitHub> artiq/test_ci ae764a9 Sebastien Bourdeauducq: Revert "conda: use python 3.5.3"...
<sb0> bb-m-labs, force build --branch=test_ci artiq
<bb-m-labs> build forced [ETA 35m39s]
<bb-m-labs> I'll give a shout when the build finishes
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<bb-m-labs> build #492 of artiq-board is complete: Success [build successful] Build details are at http://buildbot.m-labs.hk/builders/artiq-board/builds/492
<bb-m-labs> build #1428 of artiq is complete: Failure [failed python_unittest_2] Build details are at http://buildbot.m-labs.hk/builders/artiq/builds/1428
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<GitHub> [artiq] sbourdeauducq deleted test_ci at ae764a9: https://github.com/m-labs/artiq/commit/ae764a9
<sb0> freeze spray isn't doing anything
<Guest79902> [artiq] sbourdeauducq pushed 1 new commit to master: https://github.com/m-labs/artiq/commit/28211e0b32f92e73a650364f129ce4cc9ba7aac2
<Guest79902> artiq/master 28211e0 Sebastien Bourdeauducq: gateware: reset RTIO DMA core when kernel CPU is reset
<bb-m-labs> build #493 of artiq-board is complete: Success [build successful] Build details are at http://buildbot.m-labs.hk/builders/artiq-board/builds/493
<bb-m-labs> build #1429 of artiq is complete: Failure [failed python_unittest_2] Build details are at http://buildbot.m-labs.hk/builders/artiq/builds/1429 blamelist: Sebastien Bourdeauducq <sb@m-labs.hk>
<GitHub> [artiq] sbourdeauducq commented on issue #700: ```... https://github.com/m-labs/artiq/issues/700#issuecomment-290651550
<GitHub> [artiq] cjbe commented on pull request #699 d44d3b8: I did it this way as the original implementation was broken, but I will fix this. https://github.com/m-labs/artiq/pull/699#discussion_r109114326
<GitHub> [artiq] sbourdeauducq commented on issue #699: Thanks https://github.com/m-labs/artiq/pull/699#issuecomment-290654983
<GitHub> [artiq] sbourdeauducq closed issue #679: Link Scannable LinearScan and RandomScan ranges https://github.com/m-labs/artiq/issues/679
<GitHub> [artiq] sbourdeauducq pushed 1 new commit to master: https://github.com/m-labs/artiq/commit/7ec14f26c2205f5f6bbb9a5afd25bce56552e3cf
<GitHub> artiq/master 7ec14f2 Sebastien Bourdeauducq: examples: fix after introduction of RangeScan
<GitHub> [artiq] sbourdeauducq commented on issue #699: @cjbe You forgot to update the examples. I fixed them. https://github.com/m-labs/artiq/pull/699#issuecomment-290656636
<bb-m-labs> build #494 of artiq-board is complete: Success [build successful] Build details are at http://buildbot.m-labs.hk/builders/artiq-board/builds/494
<bb-m-labs> build #1430 of artiq is complete: Failure [failed python_unittest_2] Build details are at http://buildbot.m-labs.hk/builders/artiq/builds/1430 blamelist: Chris Ballance <chris.ballance@physics.ox.ac.uk>
<GitHub> [artiq] sbourdeauducq pushed 1 new commit to release-2: https://github.com/m-labs/artiq/commit/62068da23236672cf4697c3732e7ff9d4e331672
<GitHub> artiq/release-2 62068da Sébastien Bourdeauducq: scan: fix RandomScan seeding
<mithro> sb0: When using the mor1k, the address bus still has the shadowing / masking thing right?
<sb0> ?
<sb0> the upper region is uncacheable? yes
<mithro> sb0: How does that work? How does the mor1k know not to cache it?
<bb-m-labs> build #495 of artiq-board is complete: Success [build successful] Build details are at http://buildbot.m-labs.hk/builders/artiq-board/builds/495
<bb-m-labs> build #1431 of artiq is complete: Failure [failed python_unittest_2] Build details are at http://buildbot.m-labs.hk/builders/artiq/builds/1431 blamelist: Sebastien Bourdeauducq <sb@m-labs.hk>
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<mithro> https://github.com/m-labs/misoc/blob/master/misoc/cores/mor1kx/core.py#L26 -- Looks like we get the shadowing via setting the OPTION_DCACHE_LIMIT_WIDTH to 31 bits in the FPGA
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<whitequark> sb0: regarding 1-byte data: we do not have any API to push in 1-byte data, and conversely, 4-byte data used to be broken (or so I thought)
<GitHub> [artiq] whitequark pushed 1 new commit to master: https://github.com/m-labs/artiq/commit/8b98e1ea6d2d8a00d63c938c7d4ce2f5ff1dad11
<GitHub> artiq/master 8b98e1e whitequark: test: relax test_rpc_timing: rpc_time_mean <2ms → <3ms.
<bb-m-labs> build #496 of artiq-board is complete: Success [build successful] Build details are at http://buildbot.m-labs.hk/builders/artiq-board/builds/496
<bb-m-labs> build #449 of artiq-win64-test is complete: Warnings [warnings python_unittest] Build details are at http://buildbot.m-labs.hk/builders/artiq-win64-test/builds/449 blamelist: whitequark <whitequark@whitequark.org>
<bb-m-labs> build #1432 of artiq is complete: Success [build successful] Build details are at http://buildbot.m-labs.hk/builders/artiq/builds/1432