lekernel changed the topic of #m-labs to: Mixxeo, Migen, MiSoC & other M-Labs projects :: fka #milkymist :: Logs http://irclog.whitequark.org/m-labs
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<ysionneau> I can confirm what Alain is saying on the mailing list, USB mouse is plugged (with latest official firmware), the laser of the mouse turns ON, then OFF
<ysionneau> and then does not work anymore
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<lekernel> try with the git head bitstream ...
<lekernel> if it still doesn't work, you have to dig into the USB code
<lekernel> USB is horrible, as I pointed out many times already
<ysionneau> :(
<ysionneau> with git head usb works well indeed
<ysionneau> but then some other problem is that RTEMS head is buggy
<ysionneau> and if I take the commit before the one which introduce this bug (crash at startup), then it's still buggy : cannot exit performance mode and go back to GUI
<ysionneau> nothing works (hw button, mouse click, escape, ctrl+escape)
<lekernel> take a commit from 2011 then
<ysionneau> yep I didn't try yet to take a RTEMS commit of the same day of the latest official release
<lekernel> e.g. close to where the last milkymist patch was merged. that should be safe enough.
<ysionneau> but then I fear about patches for RTEMS being removed from scripts.git
<ysionneau> but not yet integrated in rtems
<ysionneau> if this is the case
<ysionneau> hum ok
<lekernel> can't you use the flickernoise.fbi binary with the git head bitstream?
<ysionneau> close to where last patch was merged
<lekernel> I don't think the register maps have changed
<ysionneau> nop, the usb is buggy
<ysionneau> and Alain needs to modify MTK to change the colors)
<ysionneau> 15:10 < lekernel> can't you use the flickernoise.fbi binary with the git head bitstream? < that's what he tested
<ysionneau> head SoC + head flickernoise.fbi and head SoC + latest official release of flickernoise.fbi
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<jkx> Hi guys
<ysionneau> hi
<jkx> I'm total newbie w/ migen, I wanted to give it a try on a zedboard. I loaded the git version, but every single to board.Platform() raise this exception : for connector in connectors:
<jkx> TypeError:
<jkx> is there a trick ?
<larsc> python 3?
<jkx> yep python3
<jkx> 3.3
<asper> hi there. i'm currently looking into other ways for hardware development. i looked into openCL for altera, but that approach is rather bloat. Now I am lokking into PSHDL and MiGen.
<asper> from the presentation slide: Get rid of the Xst proprietary bloatware
<asper> wrong line
<larsc> asper: that will still take a while
<asper> "Direct synthesis (Mist): Migen FHDL to EDIF netlist"
<asper> is this current or future work?
<asper> ok thanks larsc.
<larsc> that was for replace xst
<ysionneau> it seems there is some code for that at least: https://github.com/m-labs/migen/blob/master/migen/fhdl/edif.py
<ysionneau> don't know if it's working or not
<asper> well ok, but this is rater not the biggest criteria. has anyone used Migen and PSHDL and has a preference?
* ysionneau never used PSHDL
<jkx> is the git Ok ?
<jkx> I get the bug on all the plateform
<ysionneau> jkx: please poste your entire example and the commands you run and the entire output either on pastebin then the link on IRC or on the mailing list :)
<jkx> ysionneau: the code is the sample code in the README on github
<jkx> ysionneau: the traceback is there : http://pastebin.com/9EQAHFrL
<ysionneau> thanks
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<ysionneau> fyi I cannot have a look right now (i'm at work) but maybe someone (lekernel?) will answer anyway
<ysionneau> just stay connected
<lekernel> jkx, I guess I just broke it. will have a look.
<lekernel> otherwise revert my last commits
<lekernel> jkx, should work now
<GitHub15> [migen] sbourdeauducq pushed 1 new commit to master: http://git.io/glXcmw
<GitHub15> migen/master bf6ab2b Sebastien Bourdeauducq: mibuild/generic_platform: fix default value for connectors
<lekernel> asper, the EDIF output for designs made of instances works, the synthesis steps themselves are mostly missing and unfortunately there is no current work in that direction
<lekernel> asper, but you can use yosys with migen, which is currently the most advanced option to synthesize to EDIF with free software
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<lekernel> asper, also, forget about PSHDL, unless you are a big Java fan
<jkx> lekernel: merci seb c ok là
<lekernel> asper, there's mibuild integration already - platform.build(design, mode="yosys")
<davidc__> yosys only gets rid of XST though; you're still using the rest of the ISE toolchain (AFAIK)
<lekernel> yeh
<lekernel> it's a first step though
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<asper> lekernel, thx will have a look at yosys. haha, your comment about pshdl isn't surprising. i am not a big java fan because i know it. the thing is, that i am not a big python fan either, but thats because of not knowing it.
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<GitHub83> [NetBSD] fallen pushed 1 new commit to master: http://git.io/dsCzPg
<GitHub83> NetBSD/master 44eeb2a Yann Sionneau: Fix linker script to include the link_set_* sections in their respective sections
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<GitHub107> [NetBSD] fallen pushed 1 new commit to master: http://git.io/Nlwslw
<GitHub107> NetBSD/master 504bd73 Yann Sionneau: Removed a lot of useless printfs
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<GitHub94> [NetBSD] fallen pushed 1 new commit to master: http://git.io/KI36Eg
<GitHub94> NetBSD/master 8d30429 Yann Sionneau: Prevent virtual address allocated to uart from being reallocated later on...
<lekernel> isn't the UART only accessed by the kernel, i.e. with the TLB turned off? or did you finally choose to enable the TLB in kernel mode?
<ysionneau> TLB is now always enabled in kernel mode
<ysionneau> except in the exception vectors
<ysionneau> but then for non-trivial tlb miss handling I re-enable the tlb
<ysionneau> now it boots up to there: https://github.com/fallen/NetBSD/blob/master/sys/kern/init_main.c#L523 , and it loads the dummy drivers for uart and timer and prints the "device tree" in the console :)
<ysionneau> mwalle: it seems writting to PSW.IE.IE does not write to IE.IE in qemu, it's not so critical but it's not behaving like the real soc :)
<ysionneau> lekernel: I am mapping paddr 0xe000.0000 to 0xc800.0000 in kernel space
<ysionneau> and very early in the boot sequence I am using a different virtual address to access it but then I switch to the 0xc800.0000 one
<ysionneau> as soon as the page table of the kernel is ready
<ysionneau> the boot so far: http://pastebin.com/evCHNcGY
<lekernel> timer0 at mainbus0>>>PLOP?
<lekernel> :)
<ysionneau> ;)
<ysionneau> NetBSD is surprisingly easy to understand
<ysionneau> or maybe I spent too much time reading it
<ysionneau> or both
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