lekernel changed the topic of #m-labs to: Mixxeo, Migen, MiSoC & other M-Labs projects :: fka #milkymist :: Logs http://irclog.whitequark.org/m-labs
<stekern>
ysionneau: I didn't read the follow up discussion after your question carefully, so sorry if I'm repeating something that has already been said.
<stekern>
doesn't netbsd have fixed kernel mappings?
<stekern>
like 0xc0000000 = 0x00000000
<stekern>
if it has, handle your tlb misses with the mmu turned off, you will of course need a register or two to handle the tlb miss, the state of those can be saved away to somewhere in that range
<stekern>
...or reserve 1-2 regs as "kernel scratch regs"
<stekern>
that's of course under the assumption that the pagetables are within the fixed kernel mappings, but at least under Linux, they are
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<ysionneau>
mwalle: how is qemu behaving regarding cache aliasing issues? if for instance I map two virtual pages 0x1000 and 0x2000 both to 0x4000.0000 and I write '1' to 0x2000 and I write '2' to 0x1000
<ysionneau>
then if I read 0x2000 , do I get 1 ? or 2 ?
<ysionneau>
on the true lm32 if cache size is not too big (nb_lines*associativity <= page size) it should read 2 I think
<ysionneau>
I don't have any special bug but I'm just wondering how qemu behaves on this topic
<ysionneau>
I guess I should try it instead of asking ....