06:45 <aeris> http://hackaday.com/2014/01/29/designing-flip-flops-with-python-and-migen/ !

07:26 <davidc__> heh; most of the commenters miss the point :)

07:51 <stekern> davidc__: indeed, but I must say that your comment in that thread (I assume you are David Carne) is probably to me as a bystander the best explanation that I have seen what Migen actually is and does.

07:57 <davidc__> stekern: that'd be me. It is a simplification, but useful for understanding why migen is good :)

09:18 <ysionneau> as always on the web, the "don't read the comments" rule applies

09:18 <ysionneau> the comments are really really so much stupid

09:20 <ysionneau> either they don't get the idea or they don't even try to and classify migen as "useless and dumb, the author should try vhdl or verilog it's more than enough"

09:20 <ysionneau> as if the author of something like that would not have tried verilog and vhdl...

09:23 <lekernel> they're actually not that bad by hackaday standards... ahem

09:23 <ysionneau> omg

10:32 <larsc> best comment so far: "This is disgusting."

10:35 <ysionneau> yeah ... this is indeed (such comments)

10:35 <ysionneau> I'm kind of replying to this one, but my comment awaits moderation

10:36 <ysionneau> oot: lttng 2.0 is really a powerful tool, I'm testing it on my x86_64 workstation, it works awesomely well and gives lots of informations :)

10:44 <qwebirc94582> Love migen concept! Thank you.

10:44 <qwebirc94582> Can I get a dev board to get started?

10:45 <larsc> any fpga dev board should be fine

10:46 <zumbi> spartan 3 is quite good and old/stable

10:46 <zumbi> I mean.. http://www.digilentinc.com/Products/Detail.cfm?NavPath=2,400,799&Prod=S3BOARD

10:47 <zumbi> but actually it is quite pricy.. I'd go for a zedboard

10:50 <ysionneau> Xilinx (and Altera afaik) toolchain are integrated in migen

10:52 <ysionneau> buy the cheapest one from either xilinx or altera :)

11:30 <larsc> the article should probably made it more clear that migen is not a HDL, but rather a meta-HDL

21:25 <Scopeuk> Just seen this folks http://hackaday.com/2014/01/29/designing-flip-flops-with-python-and-migen/

21:28 <larsc> we've seen it before ;)

21:33 <Scopeuk> I know this is its home, was meaning the coverage

21:40 <larsc> I know

22:11 <ysionneau> I wonder if this article does good or bad advertisement in the end

22:11 <ysionneau> maybe if you don't read the comments then you end up with a good a priori about it

22:12 <ysionneau> but indeed something else than a DFF would have been better, or just link to MiSoC and other stuff using Migen which are not trivial DFF or counter

22:38 <mumptai> well, public comments ;)

22:53 <sb0> "I’m a VHDL-2008 programmer who works on software defined radio. What I really like about VHDL is that it is so strongly typed. Sure, it’s more verbose, but it helps me catch a lot of errors that something like Migen would allow."

22:53 <sb0> HAHAHA

22:56 <sb0> willing to bet he hasn't even downloaded Migen and he's just reflexively defending VHDL

22:57 <sb0> somehow reminds me of the xilinx forums when I reported a xst bug and it turned into a discussion of FSM coding styles

22:57 <sb0> FPGA design is such a toxic world

23:03 <ysionneau> =)

23:03 <ysionneau> gn8!