rellla changed the topic of #linux-sunxi to: Allwinner/sunxi /development discussion - did you try looking at our wiki? https://linux-sunxi.org - Don't ask to ask. Just ask and wait! - https://github.com/linux-sunxi/ - Logs at http://irclog.whitequark.org/linux-sunxi - *only registered users can talk*
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<smaeul> maybe it's a little late for this... but H6 does actually have RSB, and it works fine with AXP805
<smaeul> clock is PRCM+0x01bc, MMIO is 0x07083000, AXP805 HWADDR is 0x745 (at least on OPi3, which does not match the datasheet)
<smaeul> I'm guessing that any chip with I2C on PL0/PL1 function 3 probably has RSB, even if it's not documented
<smaeul> oh, and clock parent is ABPS2
<smaeul> apritzel/jernej: can you try the above on H616 and see if you get anything?
<smaeul> the PMIC address may be different (is there a datasheet for AXP305?) but you should be able to see if there's an RSB controller there
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<gediz0x539> clementp[m]: A100_B3_AXP707_LPDDR3_168开发实战资源.zip - https://easyupload.io/kuohvq
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<clementp[m]> gediz0x539: thanks !!!
<gediz0x539> you're welcome. datasheet of a50 is uploaded by either libv or yoq, i think.
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<hexdump0815> jernej: when you are getting into upstreaming the h616 u-boot changes, can you maybe also upstream the rank detection stuff we tested some months ago too - looks like its not yet in mainline u-boot: https://freenode.irclog.whitequark.org/linux-sunxi/2020-09-23#27979633
<hexdump0815> jernej: for h6 that was
<hexdump0815> jernej: apritzel: and when you are getting ready to upstream the opi zero 2 dts to u-boot it might be nice to also shift over the h6 tanix-tx6 one from the kernel too and a defconfig for it as there is still no such ddr3 h6 config in the tree
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<Tooniis> does the lima driver work with fbturbo? or do I need something else?
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<Tooniis> is hardware acceleration possible at all on mainline on A13 currently?
<insep_> it did work for me on a10
<insep_> not sure how much of gpu was involved though, but at least it was showing lima for me
<Tooniis> with simple fb?
<insep_> is hw accel even possible with simplefb?
<Tooniis> idk
<Tooniis> that's why im asking
<Tooniis> afaik it isnt
<Tooniis> this q8 tablet i have uses simple fb by default
<Tooniis> idk if anything else is possible
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<Tooniis> insep: which device did you use?
<insep_> cubieboard
<insep_> also that was with 5.9.9 kernel, so not exactly mainline
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<apritzel> clementp[m]: boy, there were quite some more clocks to fix
<apritzel> clementp[m]: up to the point where I am no longer sure sharing the file is helpful, but I will leave this up for the list to decide
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<apritzel> so it seems like G2D is back (A50, A100, H616, ...), is that something useful we can make use of in the Linux driver?
<clementp[m]> apritzel: Maybe ask jernej mripard wens directly here?
<apritzel> clementp[m]: I guess it's hard to judge without seeing the code
<apritzel> I went through all clocks now and fixed them up, mostly ripples because of more parents in muxes
<clementp[m]> Cool :)
<apritzel> but audio is still left
<apritzel> I will try to send something to the list tomorrow
<apritzel> even found some tiny bugs in the H6 code on the way ...
<KotCzarny> i wonder if one can abuse g2d as offloading memcpy
<apritzel> clementp[m]: if you are curious: https://github.com/apritzel/linux/commit/5423b7652e473ca2
<clementp[m]> Maybe the PLL PERIPH is wrong : sun50iw6 says /* pll_periph0/pll_periph1: 24*N/D1/D2/4 */
<clementp[m]> sun50iw9 says /* pll_periph0/pll_periph1: 24*N/D1/D2/2 */
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<clementp[m]> This clock stuff is new for me, so I'm really not sure of what I'm saying :).
<apritzel> clementp[m]: oh, right, I spotted that before, but forgot to fix it: H616 has a PERIPH0(x4) output
<apritzel> clementp[m]: no, the other way around: H6 as a x4 output, H616 has only x2
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<buZz> meh, seems the h265 decoding on H3 doesnt work for most random h265 downloads :(
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<clementp[m]> apritzel: yes that's one more diff that will make this H6_H616_ccu.c not really easy to read
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<jernej> apritzel: I mean that port A should be fully functional, just not wired to the pins
<jernej> buZz: can you give me an example of non-working HEVC video? last time I checked it worked pretty well
<buZz> ehw, i have it as full movie , not too easy to send :P
<buZz> you want the first 20MB of the movie? :D
<buZz> meh , mplayer doesnt like that :D
<buZz> ah > Bit depth : 10 bits
<buZz> that'll be the problem, right?
<jernej> exactly
<jernej> you can easily check if it is HW or SW decoded by pressing "o" during playback.
<buZz> jernej: the problem is, the 10bit h265s wont do SW decoding at all
<buZz> kodi just seems to try to play it, and then fails
<jernej> ah, yes, I already forgot on that issue
<jernej> but anyway, H3 is too weak for that anyway
<buZz> yeah
<buZz> figured :P
<buZz> its just what i had idle on my desk :)
<buZz> it runs pretty well though, for h264 1080p anyway
<jernej> yeah, main focus was on h264 and now I consider it finished
<jernej> well, ocasional bug may pop up
<buZz> :)
<buZz> i havent found any yet
<buZz> but i'm not that fluent in using kodi, i guess
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<jernej> well, Kodi should be fine, implementation is pretty generic and independent of codec
<jernej> ffmpeg and Cedrus H264 implementation may need some improvements in the future
<jernej> mainly Cedrus
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<buZz> jernej: oh , btw , the nanopi M1 image could benefit from these two lines in startup ;
<buZz> echo "none" > /sys/class/leds/nanopi\:blue\:status/trigger
<buZz> echo "none" > /sys/class/leds/nanopi\:green\:pwr/trigger
<buZz> to not have the default heartbeat stuff illuminating half your room :P
<jernej> that's was already discussed for all board in general
<buZz> ah, np, just thought you'd like to know
<jernej> but I forgot what was result of that
<jernej> but yes, I can imagine it can be annoying
<buZz> :) easy enough to fix, i added those lines to /storage/.config/autostart.sh
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<jernej> apritzel: I can't get second emac working
<apritzel> do you request the PortA pins, function 2?
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<jernej> of course
<jernej> I checked with reg dump
<jernej> issue is that PHY can't be found
<jernej> but I don't think it's power issue
<jernej> there is another possibility
<jernej> AC200 seems to really exist on port A
<jernej> at least on H6, integrated EPHY is on AC200 die
<apritzel> in the H6 AC200 there was one I2C register bit to enable the PHY
<apritzel> yes
<apritzel> I just wasn't able to talk to that I2C device on the H6
<jernej> why not? I wrote a driver for it and it worked ok
<jernej> the only issue why it's not upstream is due to DT issue
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<apritzel> dunno, didn't investigate much, just tried some I2C debug tool
<jernej> hm... I can go other way around - disable pwm5 on Android and see if ethernet still works
<apritzel> right, there was this weird thing where they (ab)used a PWM pin for a clock?
<jernej> yes
<apritzel> the PWM module on the H616 is not the same as on the H6, it's a newer one (more channels) as used in the R40
<apritzel> there was some attempt for a driver a while ago, which I commented on
<apritzel> newer one means very different from the A13 version
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<jernej> apritzel: As soon as I changed PA10-PA12 to 7, I got "sunxi-gmac gmac1 eth0: Link is Down"
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<jernej> so yes, AC200 is there with EPHY and it will be pain to support it
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<jernej> apritzel: and yes, syscon location 0x34 is also important
<jernej> writing 0 there also breaks ethernet
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<Ashleee> oh I just remembred, that rgmii-txid fix for Pine boards, it needs to be adedd for SOpine as well (at least in my case). Where do I send the patch? :) I'm used only to github PRs but linux kernel uses mailing lists?
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<apritzel> jernej: so did I get this correctly: there is the EMAC, but also the PWM and I2C pins on PortA that we need to talk to the AC200? So they should be in the pinctrl driver?
<apritzel> I have added just the EMAC pins (as in the H6) so far
<jernej> apritzel: that's correct
<apritzel> and the AC200 also handles the audio then, so we need the audio pinmux as well?
<jernej> you mean on port A?
<apritzel> yes
<apritzel> the BSP mention them
<jernej> I don't think so, because most of the pins are occupied with rmii
<apritzel> right ...
<apritzel> so it's 10 pins for Ethernet, two for I2C3 and the PWM5
<jernej> correct
<apritzel> thanks, makes sense, I will add this
<apritzel> jernej: nice testing method, btw (taking away pins/clearing registers and seeing it stop working)
<apritzel> so what was the problem with the AC200 support, exactly? I dimly remember seeing your patches back then. Uncertainty about how it should be described in the DT?
<jernej> yeah, driver loading sequence
<jernej> ac200 should probe before ethernet, but I'm not sure how to describe that
<jernej> technically, ac200-ephy subnode belongs in mdio and in ac200 mfd nodes at the same time...
<apritzel> do we need the AC200 for something else than the PHY?
<jernej> on H6 it is also audio codec
<apritzel> IIRC all we need is to set the PHY enable bit in the I2C registers?
<jernej> you can also set led polarity there
<jernej> for H6
<jernej> and there is master enable bit for all AC200 subdevices
<apritzel> we could just set that in firmware (U-Boot) ...
<jernej> no...
<jernej> it works already, only issue is how to properly represent everything in DT
<jernej> and that won't go away
<apritzel> yeah, and I meant just not exposing all those details in the DT in the first place
<jernej> what about analog audio on H6?
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<jernej> you can't just hide everything...
<apritzel> but anyway, the PWM pin is providing the clock for what? The AC200 or the PHY?
<jernej> oh, also CVBS is on AC200 - for H6
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<jernej> PWM is master clock source for AC200, it can be used also for TVE
<jernej> and even audio, I think
<jernej> but I'm not sure if I2C interface needs by itself
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<apritzel> jernej: and if you model this PHY enable bit as an I2C controlled regulator?
<jernej> as I said, it's not just one bit
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<jernej> and imo it would be hack and you know how such things are accepted upstream
<jernej> hm... for some reason I can't probe AC200 from U-Boot on H616
<jernej> either it's not powered on or something else is missing
<apritzel> did you set up the PWM?
<apritzel> there is one PWM pin on the headers, so you could test this there (it's another channel, but just to verify that the PWM works)
<apritzel> (I mean on the Orange Pi Zero2)
<apritzel> jernej: oh, btw: there is an EMAC clock gate in the CCU
<apritzel> actually two, one bus clock gate, and one EMAC_25M clock gate
<apritzel> +0x970 and +0x97c
<jernej> I dumped pwm regs and programmed them in the same way
<asdf28> is it somehow possible to see which /dev/ttyS device corresponds to a serial entry in the device tree file?
<jernej> yes, of course, gates are enabled
<jernej> afaik EMAC_25M can be used for external phys on emac0 for clock source instead of external crystal
<apritzel> asdf28: /sys/class/tty/ttyS*/device
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<apritzel> asdf28: and you can enforce a mapping through the /aliases node in the DT
<asdf28> thanks apritzel
<asdf28> would this lead to something like "serial@c81004c0"?
<asdf28> i found "/sys/class/tty/ttyAML1/device/of_node/name" but it only outputs "serial"
<apritzel> it points to the (platform) device name, which is derived from the DT node, so it's "1c28400.serial", for instance
<apritzel> asdf28: traitor! That's the Amlogic UART ;-)
<asdf28> yes i meant to ask this in #linux-amlogic
<apritzel> no need, it's a Linux thing, so it's the same
<asdf28> haha... sorry
<asdf28> what i'm trying to do is, the bluetooth module is connected to /dev/ttyS1 in the android kernel, and i'm trying to figure out the equivalent in the mainline kernel
<asdf28> but i could not find it yet in /sys/class/tty/ttyS*/device
<apritzel> this /sys/class/tty/ttyAML1/device is a symlink, the target is the device name
<apritzel> asdf28: can you access the DT? maybe it's there in the /aliases node
<asdf28> ah... /sys/class/tty/ttyAML1/device -> ../../../c11084c0.serial
<asdf28> this worked, thanks!
<apritzel> exactly, use readlink if you need to check this from a script
<asdf28> yes i have the android DT
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<jernej> apritzel: I made mistake, apparently there is no I2C3 on port A
<jernej> it's not configured in pinctrl
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<jernej> but PWM5 is definitively important for EPHY
<jernej> albeit, there are some signs that i2c3 is used... this is very confusing...
<jernej> ah, probably it's just in suspend
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<hexdump0815> jernej: apritzel: i think i cannot be of a great help here, but maybe its useful anyway - a few weeks back i tried to get the bsp kernel working on a h313 tv box which i think has the other eth phy as well and some things you mentioned sounded familiar
<jernej> I think I found root cause - pull ups weren't enabled on i2c3 port
<hexdump0815> jernej: apritzel: for instance i had to enable the ac200 node on the tv box which is disabled in the opi2 dts to get ethernet working and some other things were different too
<jernej> interestingly, in BSP DT they are not, but if you decompile DT from box, they are
<hexdump0815> also the box dts had some extra ""PI15", "PI16"" on the gmac0 and gmac1 nodes which i think were reuired ... but as said, i'm not fully understanding what i'm saying here :)
<hexdump0815> with the above mentioned x96q dts i had ethernet finally working on the box
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<apritzel> hexdump0815: PI15 is MDIO, which is always required
<apritzel> PI16 is EPHY_25M, as jernej mentioned this might be the clock for an *external* *100Mbit* PHY
<apritzel> but I doubt they use this, it might only make some sense for really cheap dual 100Mbit Ethernet, as you could save the crystal for the (external) PHY
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<jernej> apritzel: why only fast ethernet? OPi also uses 25 MHz crystal for Realtek gigabit PHY
<apritzel> don't you need 125 MHz for GBit?
<jernej> sure, but there are PLLs...
<jernej> apritzel: I can now probe AC200 over I2C in U-Boot
<jernej> however, it's very sensitive and can lock up quickly
<jernej> only power cycle helps then
<apritzel> jernej: very nice! so you need PWM (24 MHz bypass?) and I2C3 with pull ups?
<jernej> but, communicating doesn't make any sense
<hexdump0815> oh yes - my fault - it was only PI16 ... that one is there in the box dts and not in the opi dts - and there is a use_ephy25m flag in the dts which is set to 0 in the opi dts and not required for the box
<jernej> I can only read register 0, which is ID
<jernej> everything else is sometimes all 0, sometimes all ff
<jernej> and write does nothing
<apritzel> jernej: what's the bus frequency?
<apritzel> I wouldn't expect this to be a problem for a device such close, but anyway ...
<jernej> DT has it set to 200k, I set it to 100k
<jernej> datasheet says 200k max.
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<jernej> it's a bit annoying, because it's paged access
<jernej> and reg width is 8, while data width is 16 bit
<apritzel> so can you enable the PHY? then claim it's just there in the DT and boot Linux with it? Just for checking ...
<apritzel> or do you do this on the OPi?