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<MoeIcenowy>
KotCzarny: I think deasserting AR100 reset is not allowed in Non-Secure
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<smaeul>
jernej: it won't be mandatory. my changes to ATF automatically use the firmware if it is present, and fall back to the "native" code if not
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<smaeul>
jernej: note that even the "native" ATF code uses the AR100 for some powerdown tasks, so you can't use CPU hotplug if you want to run your own firmware
<KotCzarny>
but it seems 4.14/19 is also available
<KotCzarny>
shipping 30usd. what-the-fuck.
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<lvrp16>
KotCzarny: what do you expect? lol
<lvrp16>
throw shit over a wall without a care
<KotCzarny>
:)
<KotCzarny>
ya, last time they tried to ship me evaluation boards, they did it via fedex too, but in a way fedex wanted to scam me for a hundred of bucks for a boards valued ~20usd
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<wens>
at least mediatek does upstream their own stuff
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<plaes>
is there a way to "fake" the IRQ pin with general GPIO?
<plaes>
because on A20, irq pins are these: PC19..PC22, PH0..PH21, PI10..PI19
<wens>
maybe it doesn't? :p
<plaes>
maybe :D
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<karlp>
are there any sunxi chips that don't have 100M ethernet anyway?
<karlp>
what's the attraction of adding an enc28j60?
<veremitz>
another ethernet!?
<karlp>
usb is faster, easier, and would work otu of the box....
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<plaes>
yeah.. I'm out of USB ports :D
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<dgp>
plaes: you would have to poll the gpio and then trigger an irq. You'd probably end up with an interface that drops most of the frames coming in
<dgp>
plaes: use a switch
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<plaes>
no room for switch
<dgp>
are you using an enc28j60 module? microchip have small ethernet switches (I think they have 2 port..). But probably not something you can get in module form
<dgp>
s/2 port/1 + 2 port/
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<plaes>
yeah, they have, but all that have more than one ports also require MII
<dgp>
KSZ8863RLL: Two 10/100BASE-T/TX transceivers and one RMII interface.
<plaes>
well, my platform is Olinuxino Lime2
<dgp>
there might be something else on the board you aren't using that has an interrupt line you can steal
<libv>
plaes: on an unrelated note, there's captured 24bit 720p being shown on hdmi-out and the status lcd (which includes two sprites for text and logo overlays) for the fosdem project
<dgp>
IIRC linux does have some support for polling ethernet devices so netconsole (I think) works while interrupts are enabled but it would be horrible
<dgp>
s/are enabled/are disabled/
<plaes>
libv: yup, I've been following your progress
<libv>
we now are actually taking buffers from csi1, and displaying it on overlays (full frontend), and they are stable
<libv>
i just need to get the hdmi out mode of the bpi set just right so the picky tfp401 does the right thing
<libv>
full hd is too much for the frontend though, but i have not tried boosting its clock yet
<libv>
i think 256MHz should be plenty though, as i locked all defe/debe engines to that
<wens>
libv: maybe try boosting the mbus clock as well?
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<libv>
i tried playing with priorities, but nothing good that did not kill csi1 absolute priority
<libv>
thanks for the tip though
<libv>
we are stable at 720p which is our target resolution
<libv>
capturing 3bytes at 148.5MHz, and then displaying them, scaled, twice, just in time, might just be pushing it for the relatively low memory clock of the lime2
<KotCzarny>
libv, tbh they have own allwinner page
<ElBarto>
KotCzarny: you are refering to cores: 1 ?
<KotCzarny>
and a link on linux-sunxi wiki
<KotCzarny>
elbarto: yeah
<ElBarto>
libv: lol :)
<ElBarto>
KotCzarny: looks like a typo I guess, we always supported smp
<ElBarto>
let me fix that
<libv>
ElBarto: nagging seems a way against slacking, or so i am being told... all the time
<KotCzarny>
ya, nagging works well. it creates sense of need
<KotCzarny>
or kind of human brain polling 'is your cpu free now? no? what about now?'
<libv>
one of my favourite statements there is... "when men say that they will do something, they will do something. We do not have to be reminded _every_ _six_ _months_"
<hellsenberg>
^
<hellsenberg>
I just happen to do some things after several years of saying I'd do them
<ElBarto>
mhm, I was pretty sure that I had an account on the wiki, maybe it was deleted because I wasn't active ?
<KotCzarny>
nope
<KotCzarny>
maybe you've registerd while drunk?
<ElBarto>
well of course I was drunk, I'm drunk all the time that doesn't count
<ElBarto>
but I can't find any mail so I guess I never registered :)
<swiftgeek>
(from device connected on the other side of usb)
<dgp>
If you have an old full-speed hub available try plugging it into that.
<swiftgeek>
i don't think so + this is ehci only device
<dgp>
I'm working on an mixed ehci/musb thing at the moment and it went from not working at all to working with some things by forcing to full speed only in the phy registers
<swiftgeek>
or more like only meant to work with ehci
<dgp>
enumeration at least is meant to work with full speed hosts
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<swiftgeek>
dgp: so i dug out ThinkPad T23 and you are right ;D
<swiftgeek>
not all is great but it does enumerate
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* dgp
wishes usb bus analyzers weren't $1000 second hand
<KotCzarny>
create your own?
<swiftgeek>
usb2.0
<dgp>
KotCzarny: sampling the bus with an FPGA is easy enough but writing protocol decoders and stuff..
<swiftgeek>
dgp: i don't think that would happen unless some fun serdes
<dgp>
sigrok/pulseview has some USB decoders but they don't really work
<swiftgeek>
but you could connect usb phy and then fpga
<fALSO>
i have one of those chinese SALAE logic analisers
<fALSO>
even works with the original software :-P
<swiftgeek>
i use generic fx2lp boards ;D
<fALSO>
i think it was less than 10€
<dgp>
fALSO: I don't think that'll have the sample rate needed to capture usb high speed mode
<fALSO>
ahhh, probably
<fALSO>
i just used it for lame arduino thingys =)
<dgp>
second hand logic analyzer with the sample rate to capture it is going to be a few thousand dollars too
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<hellsenberg>
at that point you'd need to have a serdes somewhere to capture something meaningful
<swiftgeek>
hellsenberg: well as far as that part goes, this is what usb phy is for
<swiftgeek>
ULPI/UTMI stuff
<dgp>
hellsenberg: this chip (not allwinnner) has pin mux options for exporting the utmi signals outside of the chip from what I can tell
<hellsenberg>
interesting
<karlp>
dgp: have you found bugs in the decoders? or just not had hardware that can do HS?
<karlp>
swiftgeek: the fx2 style LAs can sort of mostly just about manage usb-FS, certainly not usb-hs.
<swiftgeek>
hellsenberg: so in theory i think fx3lp could pull off usb2.0 decoding job :D
<swiftgeek>
as long as phy itself doesn't crap out
<dgp>
karlp: The fs enumeration I captured didn't decode at all. But the capture was good enough to see that the d+/d- pins were swapped in the datasheet :)
<hellsenberg>
:D
<dgp>
There was an 0.9v LDO output and a 3.3v input swapped too.. that was fun
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<hellsenberg>
what kind of cursed chip would that be?
<karlp>
dgp: hwo long ago wer eyou doing this? I need to retest and make sure it's not busted :)
<karlp>
d+/d- swapped can jsut be config via i2c too, microchip hubs can all do that.
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<dgp>
hellsenberg: mstar msc313e. It's like the Allwinner v3s just in a QFN with some small advantages like memory mapped nor
<dgp>
karlp: that's possible but the code in the vendor driver for this thing has some code for swapping the data lines commented out
<dgp>
karlp: so either the datasheet is wrong or the code is wrong or both
* karlp
shrugs
<dgp>
I might tree building sigrok from source. Debian's version is probably a few years old
<dgp>
s/tree/try/
<hellsenberg>
mstar O_o
<dgp>
only cortex a7 I've found in a QFN ;)
<mru>
a7 in qfn, wtf?
<dgp>
mru: yes. They even have a dual a7 in a QFN
<mru>
dual core doesn't affect the external pin count
<dgp>
true but I imagine it gets pretty hot
<mru>
must have an exposed pad underneath
<dgp>
yeah. I haven't managed to get one of those but because of number of pins they put all the gnds on the exposed pad
<mru>
how many pins?
<dgp>
single core comes in 80 and 88 pin QFN. The dual one is probably the same
<hellsenberg>
O_o
* dgp
is trying to put one on a 6 layer board on the back of an ampak wifi module
<swiftgeek>
dgp: why qfn and not tqfp ?
<swiftgeek>
there is even a quad core tqfp :D
<dgp>
swiftgeek: QFP is massive, they usually come with all of the pins bent and so on
<dgp>
swiftgeek: and this chip is $2.5 on taobao at the moment
<swiftgeek>
oh that's amazing then
<swiftgeek>
and yeah that's the reason why i use QFN whenever possible
<swiftgeek>
i don't need to trust anyone for storing it right / shipping it right
<dgp>
I built some v3s boards but they ended up a bit too big. I managed to source some S3s (BGA) but getting a layout that would work for JLCPCB was beyond my kicad fu
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<karlp>
dgp: is it in package ram (how much?) and then spi nor for rootfs or what?
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<dgp>
karlp: 64MB of DDR2 in package. SPI NOR for root etc. NOR is memory mapped and has DMA so reading it takes almost no processor cycles
<karlp>
hrm, a bit tight for my ideas unfortunately. that's same sort of size as the sama5a parts, just probably cheaper.
<dgp>
They have a version with 128MB of DDR3 too they are like unicorns