<swiftgeek>
jonkerj: important note there is that requires >SY8106A driver or some other that is used to be enabled
<swiftgeek>
in rc1 (archlinux) it wasn't enabled for me so it didn't work
<swiftgeek>
and before i compiled vendor kernel to test pull request i was about to send, they updated it to rc2 with it enabled
<swiftgeek>
so that was fun yesterday
<KotCzarny>
can any of you send patch for sunxi_defconfig for that?
<KotCzarny>
:)
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<swiftgeek>
KotCzarny: not a user of that
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<swiftgeek>
arch has common kernel for everything
<KotCzarny>
yes, but they use vanilla mainline as a base
<KotCzarny>
and if it gets into mainline, it will trickle into arch
<swiftgeek>
KotCzarny: it already works in arch ;D
<swiftgeek>
since few hours
<swiftgeek>
KotCzarny: and again arch doesn't use sunxi_defconfig so nothing would trickle down
<swiftgeek>
and sadly never sent patch for kernel yet
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<montjoie>
wens: MoeIcenowy DLDO3 confirmed!
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<montjoie>
it is the only write I skip and gigabit works
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<montjoie>
it try to set DLDO3 from 0x16 to 0x12
<montjoie>
so clearly this voltage drop made PHY unhappy
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<wens>
montjoie: hmm, maybe bad calculation in the driver?
<montjoie>
non 0x12 -> 18 and adding 700 to it give 2500mV as requested
<montjoie>
but I lack knowledge on why vcc-pd need 2500
<wens>
because the PHY is wired to do RGMII @ 2.5V
<wens>
Hmm..
<wens>
interestingly, the cubietruck plus powers VCC-PD at 3.3V
<wens>
montjoie: if you look at the BPI-M3 schematics, on page 3, it does say 2.5V for DLDO3
<montjoie>
wens: and in dt cubietruck+ is also set as 2.5 so it explains why vagrantc hit also that
<montjoie>
wens: perhaps shematics is wrong ?
<KotCzarny>
or they use 3.3 gpio for something else there
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<jonkerj>
are you guys talking about the pinea64 gbit issue?
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<montjoie>
jonkerj: sorry no only bpim3 one
<montjoie>
and cubietruck+ also
<montjoie>
all a83t
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<wens>
montjoie: but on the PHY side DVDD33, pins 15 and 21 are correctly wired for 2.5V, while 37 is 3.3V, all following spec
<montjoie>
so I have a bad PHY which need higher voltage ?
<montjoie>
wens: what's your PHY model on your bpim3 ? just in case
<wens>
RTL8211E
<wens>
montjoie: I suggest asking for a second board :)
<montjoie>
wens: I have done it
<montjoie>
wens: but the fact I am not the only show a more deployed problem
<MoeIcenowy>
montjoie: RGMII use either 2.5 or 3.3
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<MoeIcenowy>
mripard: so could I just use one of the regulators now?
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<montjoie>
perhaps a batch of 3.3 PHY ?
<MoeIcenowy>
(the power rail is a critical one (system 3.3v) and always on
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<MoeIcenowy>
montjoie: I think it's decided by board designer
<wens>
montjoie: the PHYs are dual voltage, and configured by pulling up or down on one of the pins at power on
<MoeIcenowy>
If my memory is not corrupted (its S.M.A.R.T indicates this happened for a lot of times) RTL8211E supports both 2.5 and 3.3
<wens>
i.e. the design dictates the voltage used, and is fixed (unless you screwed up the design and the pin is left floating)
<montjoie>
since my board work well, what is the best solution for me, upgrade vcc-pd to 3.3 ?
<MoeIcenowy>
wens: P.S. don't forget BPi usually release wrong schematics
<MoeIcenowy>
montjoie: what's your board's version (on silkscreen)?
<MoeIcenowy>
I still remember according to BPi M2 Ultra schematics released, eMMC is totally not powered on ;-)
<montjoie>
MoeIcenowy: it is away i cannot see it, but last time I have the same as wens in my memory
<mripard>
MoeIcenowy: enable both, and add a comment
<mripard>
MoeIcenowy: I know it's far from ideal :/
<MoeIcenowy>
mripard: I need to reference from mmc
<MoeIcenowy>
just use reg_cldo1? (aldo3 is coupled with cldo1, and comments exist)
<wens>
MoeIcenowy: I know schematics may be wrong, but then you have nothing to check against
<MoeIcenowy>
yes
<MoeIcenowy>
check against the real board
<MoeIcenowy>
the BSP (at least it shouldn't have blocks that makes some function totally unfunctional
<MoeIcenowy>
and the Mikey ;-) (I should you should know him)
<wens>
I don't have his email
<wens>
going to dig around for BSP fex file
<wens>
dldo3_vol = 1002500
<wens>
dldo3_vol = 1002500 ???
<wens>
pd_bias = "axp81x:dldo3:1800" ???
<wens>
quite sure the voltages are correct
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<hitech95>
wens, just see the mail on asoc mailist. how would you make that possible? something like setting a prefix on dapm values?
<wens>
I'm not sure, hence I'm asking
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<hitech95>
wens, looks like that the development of that driver moved to jbrunet, he developed a similar driver. I'm waiting for the rename and then il'' try to see if I can add something (if needed) to it.
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<wens>
works for me
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<ptz>
I'm trying to understand whether the meta yocto layer has support for the Nanopi Neo Core 2 LTS. Never really used yocto before, so not exactly sure what to look for. Advice appreciated.
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<CuteIcenowy>
montjoie, wens: mikey confirmed that it's 3.3
<CuteIcenowy>
(bpi m3 rgmii vcc
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<vagrantc>
$ patch -p1 < a83t-sunxi-rsb
<vagrantc>
(Stripping trailing CRs from patch; use --binary to disable.)
<vagrantc>
there seems to be something weird with pastebin's raw output
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<tom_nov>
ptz: I don't know your particular board, but you can use some similar board (i.e. same SoC) as a base for your machine. Check the machine configuration file and adapt it...
<KotCzarny>
sunshavi: yeah, most likely you can just add 1.2 and maybe even 1.296 ghz points
<phdeswer>
I made that patch for my Opi, now goes up to 1.296 Ghz...
<phdeswer>
Might add more but waiting for heatsinks first.
<KotCzarny>
phdeswer: nah, over 1.296 requires to overvolt too much
<sunshavi>
phdeswer: before the regulator support which one was the speed?
<KotCzarny>
possible but will destroy chip faster
<KotCzarny>
even if you add heatsinks and fans
<phdeswer>
sunshavi, no idea. Dug up my Opi and started to get it to work. Then noticed the speeds, which have been set in the DT a while back (check git log). So added what I thought would be sane as speed settings.
<phdeswer>
KotCzarny, I'll see. Was not planning to go above 1.3V anyway. But curious to test if it still works stable. I know the 1.6Ghz is technically an overclock.
<phdeswer>
Anyway quite happy with 1.296Ghz atm
<sunshavi>
phdeswer: opi+2e?
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<phdeswer>
No mine is an Opi 1 plus
<sunshavi>
phdeswer: ok. time to conmute. I am going to dig and see on the web ¿how to generate the dt file with the speeds added manually? later for my board opi+2e
<sunshavi>
thanks phdeswer, KotCzarny
<phdeswer>
But that patch is for all H3's. I think it is why they limited to 1Ghz as not all boards run that fast.
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<phdeswer>
Well do not run over 1Ghz...
<KotCzarny>
1.2/1.3 is perfectly doable for opi+2e (big board, good heat dissipation)
<phdeswer>
Yep. Thus the patch I posted should work fine.
<phdeswer>
My own Opi has been fast and stable with it (and throttling nicely depending on load). Was actually positively surprised by the network speed of the ethernet.
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<dudeofx>
I been trying to install linux onto an A10 device (Mini Xplus aka Pindriver H24). Fedora sais it supports it but I get a blank screen after u-boot finishes it. I tried installing the ArchLinux cubieboard image and the same thing happens. I'ved to install the 'minimal debian server image for A10 devices' and I don't see anything even thou its supported. I know it used to boot these distros before.
<dudeofx>
the question is: Is support dropped or is there some architecture overhaul going on that is breaking the images?
<dudeofx>
Last fedora I saw working was around F18 and it worked well
<dudeofx>
I just want some headless server thing on it
<dudeofx>
I wouldn't mind going back to Fedora F18 but I need the bootloader they used back then
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