mnemoc changed the topic of #linux-sunxi to: Allwinner/sunxi development discussion - did you try looking at our wiki? https://linux-sunxi.org - Don't ask to ask. Just ask and wait! - https://github.com/linux-sunxi/ - Logs at http://irclog.whitequark.org/linux-sunxi
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<Turl> moin :)
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<wens> morning
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<Adi> Hi :) I'm desperate looking for a firmware for Eken GT70S HD it's not listed on their site.
<Turl> howdy wens
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<Turl> oliv3r: meh :)
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<wens> Turl: :D
<libv> Adi: why so desperate?
<Adi> My son can't use the tablet. I don't have a backup of stock rom/info drivers
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<Turl> Adi: have you tried contacting the seller or manufacturer?
<Adi> yes. and no reply. i tried contacting the oem.. and no reply alse
<Turl> Adi: you can ask in forums as well
<Turl> slatedroid, maybe xda
<Turl> libv may know more
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<Adi> i tried those sites too but no luck i tried 5 roms.
<Adi> that's why i'm here. i'm trying to get some help from devs
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<libv> Adi: without a fully documented device, and a script.bin and dram controller information, there is little that can be done
<libv> Adi: since you or others did not work through our new device howto in the past, there is little way back
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<Adi> i understand sir. actually my problem now is the touch screen it's not pointing to the right place. and there's an invisible boundary in the middle.
<gcd> hi devs, u have script.bin/fex for trio stealth pro 9.7 ?
<gcd> who owns or have a backup of the files @ bob.drinksbeer.org ? i need something there ,,, site is dead T_T
<gcd> here http://bob.drinksbeer.org/trio_stealth/script.fex i need this one T_T im still having trouble figuring out what to edit in some img's scriptfex , (screen upside down, colors not right, buttons not working)
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<Adi> i went there T_T inverted gsensor, over gamma and touchscreen problem. i fix my gsensor and gamma.
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<gcd> adi: how:D can u tell me what to edit @ the fex? tho i didnt have the touchscreen problems just buttons problems
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<gcd> this is the one im trying to edit http://pastebin.com/dwP1QhJT
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<plaes> argh...
<plaes> sunxi uboot code was push forced and the dram binaries were removed
<oliv3r> did anybody fork it yet?
<oliv3r> (I know i didn't :(
<oliv3r> if I do (1 << 8), i can also write that as BIT(8); is ~BIT(8) the same as (0 << 8)?
<plaes> I did
<oliv3r> so we have still a valid 'copy'
<oliv3r> you think we should back that up somewhere?
<plaes> I only have the "merged" one :S
<oliv3r> btw, if code supplied does not compile, (due to missing libdram) that is still a violation
<plaes> mhm.. I also peeked into the binaries and saw that the binaries had functions not present anywhere in the source
<plaes> I updated the bug
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<oliv3r> as did I
<oliv3r> ;)
<oliv3r> since without this blob, we either cannot compile/link (missing symbols) and don't have a valid binary in the end anyway
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<plaes> "We will upload the boot0 binary file later, with no GPL issues" ??? :D
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<oliv3r> hah
<oliv3r> it just won't boot
<oliv3r> sorry!
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<cbstep> hi
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<wens> mripard: did you get my reply on mmc-config-clk?
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<oliv3r> wens: we can use our mmc drive in 1 bit mode right?
<wens> oliv3r: we can, but no board to my knowledge uses only 1 bit
<oliv3r> wens: our board will :p
<oliv3r> sad, but true
<oliv3r> the existing hardware does mmc via spi
<oliv3r> so i'm bound to those traces that i can connect to
<oliv3r> but i rather use the mmc driver
<oliv3r> having said that, is there any error correction in the mmc/spi/sunxi driver for the cmd/mosi?
<oliv3r> i know there's a crc check on the data/miso
<oliv3r> but if your data requests are going out corrupted, how do we know those values are correct?
<wens> i have no clue
<oliv3r> wens: neither do I ;)
<oliv3r> mripard: the mv64xx i2c driver seems to be running at 200kHz according to my scope, which is odd, as the default clock-frequency for i2c when not configured is 100kHz. If I set clock-frequency = <400000> my scope tells me that the i2c speed is 800 kHz (give or take)
<oliv3r> it looks like there's something off either with the mv driver, or how sunxi clocking works
<mripard> wens: yes
<mripard> oliv3r: which kernel?
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<oliv3r> mripard: v3.19-rc4 + your sunxi/wip + your sunxi-next rebased ontop off
<wens> mripard: so, still want -clk removed?
<oliv3r> mripard: with <200000> clock-freq i get a nice and perfect 400kHz i2c data clock
<mripard> is it showing the same behaviour with just 3.19-rc4, and older kernels?
<oliv3r> i only started to mess with i2c just now
<mripard> wens: no, it's fine
<oliv3r> mripard: i'll fall back to plain rc4 first to see what happens, and i can try an even older kernel/hash if you give me one
<mripard> starting with 3.13 would be great
<mripard> and then a basic bisection
<oliv3r> mripard: ok i'll check rc4 and 3.13, but that's all the time I have unfortunatly today
<oliv3r> but that should give us just enough reference to see if this was always wrong, or is changed behaviour
<mripard> the scope traces would be nice too :)
<oliv3r> mripard: that, i can give you now.
<mripard> by "basic" bisection, I just wanted to say a narrower window
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<mripard> something like "it broke in 3.X"
<oliv3r> mripard: yeah; but i have a deadline tuesday, where i have to get the pca963x and your ssd1307 driver working by tuesday :)
<oliv3r> after that, we can look :)
<oliv3r> maybe uring th eweekend, but i may be working then too :(
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<oliv3r> that's with clock-freq = <200000>;
<mripard> interesting
<oliv3r> mripard: what is? :)
<gcd> woo finally fixed the colors !!, lol effin lcd_screen_contrast
<speakman> Just curious; I'd like to write a device driver which will utilize an SPI bus. It happens to be on A20, but I guess it's not bound to a certain platform as long as I'm using generic Linux SPI support. Problem is; I can't find any really good startup guide. Do you folks know if there's any good device driver in the kernel which could stand as a good ground for a new driver?
<mripard> oliv3r: the screenshot
<oliv3r> mripard: i ment, how is it interesting?
<mripard> wens: if you have some time, could you test the sunxi/wip/clock-indices on my github
<mripard> on your A23 board?
<mripard> no rush
<mripard> oliv3r: well, it's not at the right frequency :P
<oliv3r> ah, yeah; that's what I said ;) but it's 'perfectly' x2
<oliv3r> rc4 is the same behaviour
<gcd> guys, how will i know what name in gsensor should i edit, im onto fixing the upside down screen
<plaes> gcd: gsensor_revert_x_flag ?
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<plaes> please also add it to fex guide
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<gcd> the name , i think its the drivers?
<gcd> *its a driver name
<gcd> gsenser_name
<plaes> gcd: did you check this: http://linux-sunxi.org/Fex_Guide ?
<gcd> yah im reading it
<plaes> does the kernel recognise the accelerometer?
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<plaes> what was the name of the tablet?
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<gcd> lol honestly i have no idea of what im reading and doing, im just doin trial and error method lol, i fixed it i changed it all to 0 lol
<gcd> now onto the button thingy , how will i know the code for my buttons?
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<plaes> gcd: could you fill out the missing information on your tablet in the wiki? http://linux-sunxi.org/Trio_Stealth_Pro
<gcd> xept for using evtest which is indicated @ the guide, because im on windows
<plaes> it's missing info for touchscreen driver, accelerometer and wifi
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<wens> mripard: ok, i'll respin the sun9i mmc patches with of_io_request_and_map
<gcd> plaes: im not a pro just like i said i dont really know what im doing, thats why i kept on asking for the bob.drinkbeer.org links . im just doin trial and error , by mounting nanda and pushing my edited script.bin/fex of this img F918-WCDMA-20130423.1.1.11-a106-dou0308
<gcd> which is currently flashed on my trio9.7
<plaes> all you need is to fetch the dmesg output
<plaes> from there you can basically see which drivers got loaded and with which settings
<plaes> if you don't want to help us, we cannot help you
<gcd> oh ok , can u tell me the command for putting it to a text file?
<plaes> dmesg > foo.log
<plaes> it would be nice if it can be done as soon as machine is restarted, because the log buffer is with limited size
<gcd> oh
<gcd> not restarted yet, on that paste :D
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<plaes> well, it's close enough
<plaes> from that log: ctp_detect: Detected chip ft5x_ts at adapter 2, address 0x38
<plaes> that's touchscreen driver
<mripard> speakman: what is your driver supposed to do?
<gcd> im good w/ the sensor edit, i just changed all the 1's to 0's and its good
<mripard> speakman: and for which kernel is this for?
<gcd> im now into fixin the volume buttons
<gcd> how will i know the code for the buttons
<plaes> no idea
<plaes> gcd: dmard06 was the gsensor?
<gcd> no idea also , how will i know ? is it ok to del all gsensorX_para block and just leave 1 block to test?
<wens> mripard: ok, it's hanging for some reason
<wens> could be just the serial aliases shit again :(
<speakman> mripard: It will be talking to an Mifare reader chip. My goal is to make it an character device in /dev which will output the UID as a string as soon as a tag is presented.
<speakman> mripard: I'm using 3.4 at the moment
<plaes> gcd: basically yes :) though from the log: gsensor_detect: Detected chip dmard06 at adapter 1, address 0x1c
<oliv3r> wens: do I have to enable anything to make the axp209 to connect to the input framework?
<oliv3r> wens: or won't the button not show up anyway there?
<wens> oliv3r: you need to enable axp driver in mfd, axp pek driver in input
<wens> and the pek driver is _not_ in sunxi-next
<mripard> wens: do you want me to pull it ?
<wens> mripard: depends if anyone wants to use it for easy power off
<plaes> anyone who would like to create a dedicated accelerometer page? :)
<wens> otherwise i'd wait for dmitry to merge the thermal patch
<plaes> similar to wifi and touchscreens
<oliv3r> wens: ah then i wait ,no rush yet
<mripard> speakman: if you want a good skeleton for the SPI part, you can look at drivers/misc/bmp085-spi.c
<wens> mripard: confirmed clock-indices hangs, sunxi-next works
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<oliv3r> what does: Warning (reg_format): "reg" property in /soc@01c00000/i2c@01c2b400/pca9632@0 has invalid length (4 bytes) (#address-cells == 2, #size-cells == 1) mean when i have reg = <0x60>; and the code reads as of_read_property_u32(); i'm not sure if that's a warning form 3.13 or a warning from my dts
<wens> dts is missing *-cells in the i2c node
<oliv3r> ah, ok, i did have address and cells, but in th echild of the i2c node
<mripard> wens: do you have the bootlogs somewhere?
<speakman> mripard: thank you very much - just what I was looking for! :)
<wens> mripard: just a sec
<gcd> how will i know what code my vol + or vol - and back button
<oliv3r> wens: ah yeah the higher i2c node did change that at a later point, so with v3.13 that is undefined; thanks :)
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<mripard> wens: it looks like R_PIO never probes
<mripard> and so R_UART never does so either
<wens> funny.... works with sunxi-next
<wens> same config
<oliv3r> mripard: did we have mmc in v3.13?
<mripard> wens: it looks like it's even due to the reset controller not being there...
<mripard> hmmm
<mripard> I'm confused
<wens> huh?
<mripard> look at line 164
<mripard> pinctrl can't grab it's reset line, so the UART can't set up its muxing, so it doesn't probe
<wens> there's also one possibility
<mripard> What's weird is that I don't think we have any dependencies between the reset and clocks
<wens> since the gates probe separately, maybe they aren't chained properly?
<wens> though i don't think that's the case
<wens> the gates are leaf nodes
<mripard> well, we're not even getting to the point of trying to grab the clocks
<mripard> grabing the reset line is the first thing the pinctrl driver does
<mripard> what happens if you remove the pinctrl-0 and pinctrl-names properties in your DTS ?
<wens> for uart?
<mripard> yep
<mripard> r_uart
<oliv3r> just a quick noob question :) if i toggle gpio's via gpiod_set_value(_cansleep), do I need spinlocks for that?
<mripard> oliv3r: you want to prevent concurrency against what?
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<wens> mripard: same
<mripard> damn
<mripard> logs ?
<wens> mripard: clock debug code doesn't mention apb0* being registered
<oliv3r> mripard: writing into the chip's registers? i'm really not sure is all :)
<wens> mripard: gist updated
<mripard> oliv3r: well, gpiod_set_value is blocking
<mripard> so you wont do anything else during that time
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<mripard> unless you want to directly poke into the GPIO registers, but it looks like a recipe for disaster
<oliv3r> mripard: awesome, then i just need to test my driver and start getting it reviewed :)
<oliv3r> mripard: one more thing, the high-resolution counters that you hadded months ago for sun7i, are those related to the hrtimer at all?
<mripard> wens: hmmm
<mripard> the apb0 code is from another driver
<mripard> but I'm pretty sure it was working fine on the A31
<oliv3r> btw, i'm getting a lot of deffered notices when booting my hybrdi rc4++ kernel; from ohci, ehci, ahci etc, is that to be expected?
<mripard> oliv3r: what?
<oliv3r> mripard: the sun7i has 64 timers i think?
<mripard> no
<mripard> less than that
<mripard> probably around ~10
<oliv3r> 64bit* ouch
<oliv3r> highSPEEDtimer
<oliv3r> that's what I ment
<oliv3r> compatible = "allwinner,sun7i-a20-hstimer";
<mripard> nop
<oliv3r> that's not the highspeed timer?
<mripard> it has 56 bits timers iirc
<oliv3r> ah okay
<mripard> but I'm not sure what is the relation between the hrtimers and the resolution of the timer?
<mripard> the HS timer just go faster
<mripard> like their name suggest
<oliv3r> what is it used for in the kernel?
<oliv3r> well if it runs faster, you get a higher precision in a jiffy, no? so a hrtimer also gives you higher precision?
<oliv3r> it's not THAT far fetched :)
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<mripard> the jiffy depend on CONFIG_HZ, but is most of the time 100Hz
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<mripard> any decent timer can achieve that
<oliv3r> so hrtimers are completly unrelated to the sun7i hstimer?
<mripard> the !hs timers run at 24MHz
<oliv3r> ohh that's not so hs at all
<oliv3r> what is it used for?
<mripard> the hs timers run at the AHB frequency, so somewhere around 80MHz iirc
<oliv3r> still quite slow though
<mripard> by default at least
<mripard> slow for what?
<oliv3r> well hrtimers can, in theory, achieve ns resolution, which is ghz domain isn't it?
<mripard> HRTimers are not hardware
<mripard> it's a generic Linux stuff
<mripard> and it allows to have a resolution that match the one of your hardware timers
<mripard> so the hrtimers can achieve in theory the resolution of the timer backing it
<mripard> in our case, the arch timers
<mripard> that run at 24MHz
<oliv3r> but in theory, the hstimer could back it getting you 80Mhz hrtimers? no?
<mripard> no
<mripard> because the hr timers need to be backed by a local timer
<mripard> and the hr timers are global
<oliv3r> ah okay
<oliv3r> i think
<wens> mripard: no more time left, will be able to test it on Monday
<oliv3r> so what's the purpose of the sun7i hs timer currently?
<mripard> none
<oliv3r> yeah i skimmed that and read the usage bits
<oliv3r> but i'll go over it again tonight ;)
<mripard> and here we are, discussing what you overlooked
<mripard> :)
<mripard> wens: ok, thanks!
<mripard> wens: good evening
<oliv3r> mripard: :p just trying to learn is all! :)
<oliv3r> wens: bye bye wens!
<wens> oliv3r: just leaving the office (where i keep my boards) :p
<oliv3r> wens: see you in a bit :p
<kivutar> is it possible to use uEnv.txt without boot.scr? on cubieboard2
<kivutar> or cubietruck
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<kivutar> has ${extra} something to do with extraargs?
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<rellla> kivutar: it's possible with linux-sunxi/u-boot , but not with mainline u-boot
<kivutar> rellla, i'm using linux-sunxi/u-boot
<kivutar> rellla, is it possible to use only uEnv.txt without boot.scr?
<rellla> it is
<kivutar> good news for me
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<kivutar> rellla, looks like I just had to use bootargs instead of extraargs
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<plaes> can anyone update the new device howto template with link to Accelerometer page?
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<boycottg00gle> this crash on dpms is driving me crazy. having a a20 olinuxino micro+a13lcd10ts. using a older sunxi u-boot and older sunxi-3.4 kernel (3.4.75+) it is nearly stable™ - same kernel with mainline u-boot "xset dpms force off" will crash every now and then
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<boycottg00gle> after 35 dpms power cycles it crashed with old u-boot, too
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<libv> plaes: right, that page is locked down due to too many idiots
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<libv> plaes: don't we have a fixme template?
<libv> ah, since the others are plain links too, that will do here as well
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<paulk-collins> anyone has a decent sunxi defconfig for 3.19-rc* for debian?
<paulk-collins> sunxi_defconfig as part of the kernel looks very minimalistic
<rellla> multi_v7_defconfig is huge but works.
<rellla> sunxi_defconfig is too minimalistic :p
<rellla> in case you don't mind about too much enabled configs...
<paulk-collins> ah nice
<paulk-collins> thanks rellla
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<boycottg00gle> is there a hack to switch lcd off with mainline?
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<oliv3r> anybody have a clue how to crosscompile a very simple program, that needs ioctl.h?
<oliv3r> i take it my arm toolchain uses the arm include files, but ioctl.h isn't included tehre :S
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<oliv3r> nvm, with the linaro toolchain it works :)
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<oliv3r> is ~BIT(8) the same as (0 << 8)?
<NiteHawk> (0 << 8) sounds meaningless to me - it would yield 0 again? maybe you meant (1 << 8)? i would interpret ~BIT(8) as the negated bit pattern (all '1's except for the 8th bit)
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<plaes> phew.. all tablets done
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<oliv3r> NiteHawk: i'd agree, but what if we do x &= ~BIT(8) vs x = (0 << 8);
<NiteHawk> the former seems 'natural' to me as applying a bit mask to clear bit 8. i still can't get my mind wrapped around the latter - assuming you'd either assign (=) or apply (&=) 0 << 8, you'd end up with x = 0?
<oliv3r> NiteHawk: well yeah, but it's all about clarity
<NiteHawk> an arithmetic left shift of 0 is zero
<oliv3r> yeah but having #define ON (1 << 8); #define OFF (0 << 8); makes for a better read
<oliv3r> if later in the code you have 'something(ON) | something(OFF)
<NiteHawk> ok, that's getting closer
<NiteHawk> though i'd prefer OFF to be ~(1 << 8) - but that depends on context
<oliv3r> so i was wondering, if you ahve BIT(1), BIT(2), BIT(3), i wouldn't wanna write (0 << 1), (0 << 2), (0 << 3) next to it
<NiteHawk> imho, the way to go would be to use SET(bit-index) and CLEAR(bit-index) macros...
<oliv3r> so BIT(8), ~BIT(8) reads a little cleaner
<oliv3r> can't always use those macro's though
<NiteHawk> i.e. SET(something), CLEAR(something)
<NiteHawk> so, yes - BIT(8), ~BIT(8) appeals more to me
<oliv3r> so is ~BIT(8) the same as (0 << 8), i think the consensus is no, it's not unfortunatly
<NiteHawk> mathematically / logically: no. that's two different integers
<NiteHawk> (0 << n) is always 0, regardless of n. which made me believe what you really want is ~(1 << n)
<oliv3r> what triggered me was PWM_OUTPUT_LEFT
<oliv3r> git grep -A 1 -B 5 PWM_OUTPUT_LEFT
<oliv3r> where you want to write those defines as BIT() rather then 1 <<
<NiteHawk> i'm okay with 1, i don't get why you would want 0
<oliv3r> consitency :p
<oliv3r> looks prettier
<NiteHawk> well, it's okay as long as your assignment only affects a single bit. it's not useful as a "bit mask"
<NiteHawk> (which is the point where you might introduce another inconsistency, thus)
<oliv3r> yeah
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<NiteHawk> i have a feeling it shouldn't be defined that way in the first place? the ways this works is that the various PWM_* constants / defines are combined via a logical or later. while it works (in terms of clarity/consistency) to some degree for this specific example ("have bit 5 cleared" for "LEFT" pwm output logic / flanks), i find it confusing for actual "ON/OFF" toggling
<NiteHawk> admittedly there's some conflict for "control_reg = something_A | (0 << 8) | something_C", if you want to introduce a symbolic name for the constant ("something_A | something_B | something_C"). however, to an unsuspecting reader this might suggest that "B" is supposed to be set/active. OTOH (~something_B) obviously won't do in its place. and then again, when later switching configuration, the negated bit mask may be the only wa
<NiteHawk> y to achieve the desired result...
<NiteHawk> i'm afraid there's no "one size fits all" solution that would solve it all
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