ChanServ changed the topic of #linux-rockchip to: Rockchip development discussion | IRC log http://irclog.whitequark.org/linux-rockchip | Community GH https://github.com/linux-rockchip | Rockchip GH https://github.com/rockchip-linux | ML https://groups.google.com/group/linux-rockchip
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<ramcq> is "vpu-service" in the rockchip kernel the custom rockchip interface?
<ramcq> and rockchip-rga is the v4l2 m2m driver for decode that CrOS uses?
<ramcq> or there is a different driver that does v4l m2m slice?
<phh> ramcq: rga isn't for decode, it's for things like scaling/color conversion/... afaik it shouldn't be used as part of video decoding pipeline, because the VPU+LCDC is already enough
<phh> though cros indeed has a v4l2 m2m decode driver (it supports only h264 and vp8 though)
<ramcq> well that explains why this v4l code isn't working :D
* ramcq has a patched chromium to turn back on the cros code
<ramcq> need to dig the kernel config a bit more than
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<Ke> I have now a spi nor, how could I connect it to firefly-rk3399 to make it bootable
<Ke> just the normal gpio spi connections?
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<Ke> if I put "something" to the chip I have and connect it to spi1 as documented in firefly gpio interfaces, I get no output on serial, not even the hw greetings
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<Ke> wonder if the spi is read before any initialization is done
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<mmind00> Ke: I think you'll only ever get output once the spl has configured the uart ... maskrom itself doesn't talk
<Ke> mmind00: are you positive, I get output, if I disconnect sd and spi and disable the emmc
<Ke> the only configuration I do not get output is, when spi-nor is connected to spi1
<mmind00> Ke: not 100%, but I never got anything from maskrom on all chips I had so far
<Ke> I wouldn't have thought so, but where do you think the code is loaded from?
<mmind00> Ke: don't know ... also I don't know what sort of output you get ;-)
<Ke> I can pastebin
<mmind00> ok :-) .... because the maskrom area is often very small, so I don't think they'd keep uart init + text in there
<mmind00> but it is of course possible that it changed with say the rk3399
<Ke> could it be that the eMMC is accessible with spi mode, but the switch to eMMC native mode fails?
<mmind00> Ke: that definitly looks like the regular Rockchip 1st stage loader ... I really don't think that DDR-init and friends will be sitting in the maskrom
<mmind00> especially as it also talks about the ATF there (TrustBL ...)
<aalm> mmind00, what do you think about the @rockchip push to break ie. rk3188 in u-boot w/untested code? :D
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<mmind00> aalm: I don't follow uboot development that closely so you will have to enlighten me ... but also please don't call it a "push to break..." ... breakage in 99% of cases is unintentional
<aalm> patches to remove the rk_timer to be replaced w/"arm arch timer", which doesn't exist on Cortex-A9, they should have known, right?
<maz> aalm: could really be a honest mistake done by an engineer that has been task to improve support for recent SoCs, and didn't know about TWD...
<aalm> i hope so
<maz> aalm: and frankly, I'd rather forget A9 altogether.
<mmind00> aalm: what maz says ... i.e. the rk3188 is from 2013 or earlier ... I don't even know if the developer was with Rockchip back then
<mmind00> aalm: and when I did the initial rk3188 support, Kever did a lot of work in tracking down the maskrom oddities it has ... including finding the maskrom-developer who knew
<Ke> mmind00: thanks anyway, any idea, is there some instructions on building spi bootable rom?
<mmind00> Ke: sadly no idea
<Ke> ok, thanks
<Ke> I could perhaps just yank that broken eMMC off, perhaps it could help me do SD boot
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<beeble_> Ke: you did a mkimage with the rkspi paramater?
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<beeble_> and as mmind00 said, thats miniloader you see
<beeble_> and at what offset are you flashing u-boot into the spi nor?
<beeble_> should be offset 0 for the spl
<Ke> beeble_: that's about the only thing I did
<Ke> ok
<Ke> if I change the out.img offset to 0 does the u-boot.img still go to 512?
<beeble_> http://git.denx.de/?p=u-boot.git;a=blob;f=board/theobroma-systems/puma_rk3399/README;h=f67dfb451ffd36745a5209a83459a8337134b75d;hb=HEAD#l91
<Ke> the offsets of the second image change, which leads me to believe that offset is defined in the first image
<Ke> on the link I shared, the second image is at 512, but that's on SD
<beeble_> you are building mainline u-boot?
<Ke> no idea, what will it do on spi-nor
<Ke> beeble_: right now I am using prebuilt debian sid images, as in the linke
<Ke> but I have tried almost everything
<Ke> the hw is sort of broken, but I want to try one proper spi-nor boot before discarding the hw
<Ke> I'll read up on mainline u-boot config options to see, what's there about spi-nor boot
<beeble_> ok looked at your pastebin. the 512 is 256kB, because of the blocksize
<beeble_> so thats exactly 0x40000
<Ke> yes, that is correct
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<Ke> oh
<beeble_> the sf command requires a hex value
<Ke> I think I may have used 2MiB offset
<Ke> which could explain some problems
<beeble_> but you should see spl output
<beeble_> even if you flahed the u-boot.img at the wrong address
<beeble_> if it's mainline
<beeble_> if the precompiled stuff is using miniloader
<beeble_> then the output is correct :)
<Ke> I think the precompiled stuff can't use closed source miniloader?
<Ke> since it's debian main
<beeble_> "firmware"
<beeble_> that's often a workaround for some people
<vagrantc> what board?
<Ke> firefly-rk3399
* vagrantc has had many long fights with the firefly-rk3399
<Ke> has anyone done spi boot on it?
<Ke> I would love to know, whether I at least have the correct pins
<vagrantc> i've done eMMC boot and microSD boot ... but microSD boot doesn't work consistantly
<Ke> beeble_: http://opensource.rock-chips.com/wiki_Boot_option here I got my loader start at 8MiB, which is not sector 512
<Ke> I just did not notice 0x40000 is not 0x4000, which is in unit of sectors
<Ke> so someone is using offset that is not 512 sectors
<beeble_> so first thing. check your spl if it's mainline or or miniloader
<Ke> perhaps I'll try building mainline u-boot again
<Ke> but I should probably try that offset 0 for the spl, if it is supposed to print at least something
<Ke> the excerpt I have has a date, so it should be clearly discernible, as the build is fairly new
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<vagrantc> does the initial loader actually support loading from spi?
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<Ke> rk3399 does support SPI-nor and spi-nand boot
<vagrantc> but isn't there some boot rom that may or may not implement all of those methods?
<Ke> Kevin actually boots from spi-nor, I believe I got the spi-nor model from kevin
<vagrantc> ok
<beeble_> vagrantc: your rk3399-q7 does boot from spi :)
<beeble_> Ke: strings u-boot-spl.bin | grep U-Boot
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<beeble_> to see if it's mainline spl or miniloader
<Ke> U-Boot SPL board init
<Ke> is that the one you wanted?
<beeble_> so thats mainline, thats good
<vagrantc> i thought u-boot-spl is only used when miniloader isn't used
<beeble_> vagrantc: i had to be sure what he tries to use. the naming suggested u-boot spl
<beeble_> but the output he gets is from miniloader
<Ke> beeble_: the output is there exclusively, when the spi is NOT connected
<beeble_> Ke: so flash that to offset 0 and then you will see u-boot output
<beeble_> Ke: oh, then i misread the backlog
* vagrantc sees xypron in other channels
<Ke> beeble_: any words on the spi pinout?
<Ke> well, I'll try it out anyway
<Ke> at least the pinout I am using silences the eMMC SPL/miniloader and does not harm the spi-nor chip
<Ke> both are sort of good signs
<beeble_> no idea about the firefly, but it should spi1 you are using spi boot
<Ke> yeah, it's spi1 in firefly docs
<beeble_> and the bootorder is spi - emmc - sd
<Ke> I yes
<beeble_> so it must find the rockchip header
<beeble_> otherwise it would load the emmc bootloader
<Ke> yeah, that's what I thought
<Ke> but I definitely had offset of 64 sectors then
<vagrantc> best thing i ever did was overrwrite the emmc bootloader
<vagrantc> and the worst thing was attempting to use it again
<beeble_> the bootrom actually looks at multiple locations for the header
<Ke> vagrantc: yeah, I had that hindsight as well
<Ke> now I can't erase the eMMC anymore
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<beeble_> could it be that xypron changed the baudrate for mainline u-boot to 115200?
<Ke> could try that
<beeble_> is there a u-boot .config for this build available?
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<Ke> https://packages.debian.org/source/sid/u-boot I guess this is as easy as it gets
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<beeble_> vagrantc: what config are you using :)
<vagrantc> it looks like it just uses the installed package in the chroot it builds, but it's not clear how it installs the u-boot
<vagrantc> beeble_: just whatever mainline produces ...
<vagrantc> i might have patched the FDTFILE or something
<beeble_> if you are using the defconfig then it's 1500000 baud
<vagrantc> yeah
<vagrantc> i was actually toying with shipping the config each image was built with
<vagrantc> it's a small additional file per board, and can help answer these sorts of questions
<Ke> anyway thanks a bunch, I'll get some sleep now
<Ke> spl at offset 0 gave just silence
<Ke> tried also some different serial speeds
<vagrantc> what serial monitor are you using?
<beeble_> vagrantc: the list of files at https://packages.debian.org/sid/u-boot-rockchip is broken right?
<Ke> minicom
<vagrantc> does it support 1500000 baud?
<Ke> yes
<Ke> I got the logs in the pastebin
<Ke> anyway, good night
<vagrantc> beeble_: apparently ...
<vagrantc> beeble_: i don't use that interface often
<vagrantc> beeble_: but i do recall vague mention of it
<beeble_> whee, buster has a new picocom
<beeble_> finally higher baudrates
<vagrantc> screen a while ago too
<vagrantc> beeble_: the armhf files link appears to work fine ... so i'm guessing some cache is just outdated, since the arm64 package wasn't always available
* vagrantc is tempted to try xypron's script and see if it works
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