ChanServ changed the topic of #linux-rockchip to: Rockchip development discussion | Wiki at http://linux-rockchip.info | Logs at http://irclog.whitequark.org/linux-rockchip | ML at http://groups.google.com/group/linux-rockchip
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<naobsd> jmcneill: is 0x60000800 right?
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<jmcneill> naobsd: it works now
<jmcneill> i had tag hdr len/type fields swapped
<jmcneill> args[2] has the address, sometimes (but not always) it's 0x60000800
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<naobsd> hm, any macro for 0x60000000 is not defined...
<Tony_> Flash for Ubuntu(rk3188) is okay ?
<Tony_> I tried GNU Gnash, but it works not all fine.
<naobsd> jmcneill: MAX_BOOT_STRING 255 is too short...
<naobsd> partition info is long :(
<jmcneill> yeah i have been prepending boot options for netbsd kernel
<jmcneill> I'll bump it. 1024 ok?
<naobsd> jmcneill: it will be ok but if you need real linux/arm max, please give me some minutes
<jmcneill> looks like max is UINT32_MXA
<jmcneill> MAX
<jmcneill> tag has arbitrary size
<jmcneill> well, UINT32_MAX - 4 (tag header) - 1 (\0)
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<naobsd> ah, no
<naobsd> #if defined(CONFIG_RK_CONFIG)||defined(CONFIG_MACH_RK_FAC)
<naobsd> #define COMMAND_LINE_SIZE 65536
<naobsd> #else
<naobsd> #define COMMAND_LINE_SIZE 1024
<naobsd> #endif
<naobsd> in arch/arm/include/asm/setup.h in linux
<naobsd> it's strl* size, include nul
<Tony_> naobsd, would you say something for my question ? ;)
<naobsd> Tony_: sorry, I don't use flash
<jmcneill> so 64k or 1k?
<jmcneill> i mean, realistically, 64k is excessive
<jmcneill> (and wasteful)
<Tony_> naobsd, anyway, thank you.
<naobsd> jmcneill: I think so too
<jmcneill> netbsd only needs root=, maybe a few mi boot flags, and hopefully eventually console=fb
<naobsd> jmcneill: please use 1k, and comment about 64k
<jmcneill> 10-4
<jmcneill> any progress with chip id?
<naobsd> I made a patch to add 16bytes ascii to cmdline
<naobsd> it will add chipver=
<naobsd> I'll prepare binary soon...
<jmcneill> was hoping you had something a bit more automagic
<jmcneill> are you making it so it is automatically added to cmdline (not required in parameters file)?
<naobsd> yes
<naobsd> read rom, add string to cmdline at run time
<jmcneill> great
<jmcneill> I have code to adjust apll freq (for CPU) but it seems to break MMC. Arg.
<jmcneill> cpu0 at mainbus0 core 0: 1008 MHz Cortex-A9 r4p0 (Cortex V7A core)
<naobsd> oh nice
<jmcneill> and RK3188 specific
<naobsd> ah
<naobsd> I think you want px2 board now ;)
<jmcneill> You will never convince me.
<jmcneill> Looking for faster boards, not slower.
<jmcneill> symptom of faster cpu:
<jmcneill> ld0: 1148 KB, 2 cyl, 16 head, 63 sec, 512 bytes/sect x 2296 sectors
<jmcneill> should be 8GB
<naobsd> px2 board has on-board usb-sata and i2c accelerometer/magnetmeter too!
<jmcneill> i have awin boards with real sata
<jmcneill> *board
<jmcneill> I wrote a Timer driver today too, but also PX2/RK3188 specific.
<naobsd> well, rk3188 is 64bit timer, rk3066/px2 is 64bit timer
<jmcneill> I think some of the older ones have 32-bit timers instead of 64-bit with different reg layout.
<naobsd> grr
<naobsd> well, rk3188 is 64bit timer, rk3066/px2 is 32bit timer
<jmcneill> Oops I meant RK3188 specific. Yeah.
<naobsd> anyway, please add rk3188 one, I can modify it
<jmcneill> Easy to modify it but need board detect first.
<jmcneill> soc detect
<naobsd> yes, please wait...
<naobsd> um, oh
<naobsd> bootloader always modify cmdline (add some params)
<naobsd> and I noticed u-boot does it differently a little ;) (compared to proprietary loader)
<naobsd> strangely, when unofficial "load images onto RAM" way is used, it does same ;)
<naobsd> anyway, it's ok, I stated u-boot is for developer only (for now), and difference is minor
<naobsd> lets make binaries...
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<jmcneill> btw here's another pending patch, but it doesn't work yet (matt@n.o thinks he has spotted the problem in common arm code): http://www.netbsd.org/~jmcneill/rockchip/rockchip-2gb.patch
<naobsd> jmcneill: ah, well, you said "mem size detection doesn't work yet", is that MEMSIZE=2GB issue? (not detection issue)
<naobsd> jmcneill: I know that issue, some evbarm board with 2GB+ mem doesn't boot
<jmcneill> yup
<jmcneill> well, with this patch, you won't have to specify MEMSIZE
<jmcneill> same kernel should work with 1GB and 2GB boards
<jmcneill> (once that other bug is fixed)
<naobsd> ryo@ did something with imx6, that machdep.c doesn't have ram_size tweak code
<naobsd> I thought rockchip code is copied from awin, so 2gb will work ;)
<Tony_> naobsd, I want to skip flash, and modify AP6330 again.
<Tony_> naobsd, I use the same kernel with Android.
<Tony_> naobsd, the above is log. they are differes.
<Tony_> *differences
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<jmcneill> zzz
<naobsd> jmcneill: I confirmed new u-boot binary, let's upload.... oh, good night :)
<naobsd> Tony_: sorry, I already answered, I have no more info now
<naobsd> jmcneill: about 2gb patch, KERNEL_BASE_PHYS=0x80000000 is really correct?
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<naobsd> mmind00: did you try mainline on firefly? how about cpufreq > 1.2GHz?
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<Tony_> naobsd, okay, I don't porting ubuntu now, it seem work okay almost. ;)
<Tony_> naobsd, the good news is that I begin to porting my new rk3288 board.
<Tony_> naobsd, it's a interesting development.
<Tony_> the large diffes between 4.4.x and 4.2.2 is the first one use repo to manager code.
<Tony_> I think that I need learn to create a local mirror repo.
<Tony_> How did you do it ? like 4.2.2's method ?
<naobsd> ?
<naobsd> tablet sdk uses repo. rbox sdk uses git because of single big git
<Tony_> naobsd, where are your repositories ?
<naobsd> Tony_: sorry, I cannot understand question
<naobsd> my repository is on my machine, of course
<Tony_> Yes, we also use the single big git for rk3188(android 4.2.2).
<Tony_> but when we use the rk3288, there is only repo.
<Tony_> ;(
<naobsd> there are tablet sdk for rk3188 and there are rbox sdk for rk3288 too
<naobsd> anyway _rockchip_ uses repo for tablet sdk
<naobsd> I'm not _rockchip_
<naobsd> and there is a doc from Rockchip
<Tony_> okay, but if RK update something, you can't run "repo sync" to update your code.
<naobsd> how to use repo is described
<Tony_> ;)
<naobsd> no, "repo sync" updates local repositories from remote server
<Tony_> What I mean is you update your code from RK.
<Tony_> if you don't use repo.
<naobsd> get repo command, run repo init, run repo sync, that's all
<Tony_> yes, I think so. and actually i know how to use repo tool, but I think the local repo service is complex.
<naobsd> I can update my repositories which uses git with "git remote update", and I can update my repositories which uses repo with "repo sync"
<Tony_> okay, I got it. you use both of them.
<naobsd> Tony_: making repo mirror is another story
<Tony_> naobsd, yes, it is another story, but it is necessary for development team.
<Tony_> naobsd, don't you think so ?
<naobsd> Tony_: repo init --mirror is first step
<naobsd> Tony_: I know. I made some repo mirror
<naobsd> Tony_: "What I mean is you update your code from RK." I don't get anything from RK
<naobsd> Tony_: I explained I don't make any product
<naobsd> I'm just talking about technical thing
<naobsd> "from RK or not" is meaningless
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<naobsd> jmcneill: I tried latest kernel on RR. ld0 is recognized properly, but it seems sector 0 cannot be read (both boot from NAND and from SD)
<naobsd> jmcneill: I noticed SD boot sometimes failed at reading kernel from SD. I exchanged SD card, some works, some not
<naobsd> strange, SD boot was more stable
<naobsd> currently I'm using RR pro
<naobsd> but it's new for me. I should try old RRs
<Tony_> naobsd, okay.
<naobsd> mmm, same result with old RR
<naobsd> some SD cards are unusable for SD boot :(
<naobsd> maybe latest u-boot binary is wrong?
<naobsd> previous u-boot binary is same(unstable)
<naobsd> hmm
<naobsd> I think I used proprietary loader for "stable SD boot"
<naobsd> or luckily I used stable SD card for u-boot sd boot
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<pacopad> @naobsd : Hi naobsd , is it possible to build an Android kernel with your sources ?
<naobsd> pacopad: can you explain more about "Android kernel" and "your source"?
<pacopad> i cloned the next-20141210 branch fro mgithub
<pacopad> and i need to produce kernel.img and resource.img to flash my board
<naobsd> it's (litlle old) "mainline Linux" kernel source, not Android source
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<naobsd> pacopad: do you have any experience with mainline?
<pacopad> I had experience with allwinner a20 kernel compilation , not sure it was mainline
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<naobsd> pacopad: generally "mainline kernel" is not "Android kernel", you have to understand this first
<naobsd> (I'm still not sure what you expect from "Android kernel", I assumed it's kernel to run Android OS)
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<pacopad> yes it’s that
<pacopad> i build an android os and i want to update the kernel cause i got network ethernet problems
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<pacopad> on rk3288 board
<naobsd> anyway, answer for "is it possible to build an Android kernel with your sources ?" is no, because it's "mainline kernel", not "Android kernel".
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<pacopad> ok thank you for anwser , i got also my problem with linux and mainline kernel maybe you’ll have an idea on my perf problems
<pacopad> with iperf io got only 2Mbps with negociated at 100/full
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<pacopad> 1000/full sorry
<pacopad> when i force 100/full i obtain 90Mbps
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<rperier> hi all
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<Astralix1> Hi all
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<ganbold_> naobsd: so even though I put CONFIG_BOOTDELAY in include/configs/rk*, it doesn't stop. It stopped before doing fastboot -i 0x2207 oem unlock
<naobsd> pacopad: mainline kernel on firefly? which driver are you using?
<naobsd> ganbold_: put CONFIG_BOOTDELAY? there is CONFIG_BOOTDELAY 0 in rk32plat.h, I think you should modify it
<naobsd> ganbold_: btw what do you want with it?
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<pacopad> @naobsd : i dont have compiled it myself, it’s the kernel shipped with the ubuntu version
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<naobsd> pacopad: it's not "mainline linux"
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<ganbold_> naobsd: I want to stop at boot prompt and issue commands like dcachec off, dcache flush
<jmcneill> naobsd, yes 0x80000000 for kern base phys, see CUBIETRUCK kernel config
<tizbac> naobsd, i've got the kernel from the manufacter of various tablets
<tizbac> i'm still downloading it, if you want i can give you the link to it to see if it can be usefuk
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<jmcneill> naobsd: for sd stability issues, try a non-MP kernel, I think something is wrong with cortex-a9 code
<ganbold_> naobsd: even though I modified CONFIG_BOOTDELAY in rk32plat.h it is not stopping, maybe this is because fastboot unlock
<ganbold_> naobsd: before fastboot unlock it stopped
<jmcneill> hi ganbold
<ganbold_> hi
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<jmcneill> ganbold, apart from rk30xx_mp.c was there anything else you had to do for mp spinup?
<ganbold_> jmcneill: no
<ganbold_> jmcneill: I mean that was the only one I did
<jmcneill> must be something funky with cortex a9 support in netbsd head then
<ganbold_> iirc a7 had some problem in netbsd, I think was it nick fixed something
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<jmcneill> yep it was a7
<jmcneill> no problems on those (a20/a31/a80)
<jmcneill> well, a80 has some problems, but i think gic related
<ganbold_> how is it going except smp?
<jmcneill> i wrote some code to scale up cpu freq and it seems to work except it breaks sdmmc
<jmcneill> any attempt to debug it unbreaks sdmmc
<jmcneill> driving me crazy
<ganbold_> no progress today for me, wanted to disable dcache in u-boot but it is not stopping with boot delay defined, strange
<ganbold_> anyhow will check that tomorrow
<Astralix1> hi gangbold
<Astralix1> do you use 3288 or 3188?
<ganbold_> 3288
<Astralix1> I do have a uboot built that stops countdown
<ganbold_> Astralix1: does it have fastboot feature?
<Astralix1> let me check
<ganbold_> once I unlocked in fastboot it is not stopping anymore
<Astralix1> I moved to a new account on a different machine, so still fetching and collecting everything
<Astralix1> ah
<Astralix1> ok, I see
<Astralix1> so enable fastboot does break contdown?
<Astralix1> which board? firefly?
<ganbold_> yes
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<ganbold_> I think after oem unlock
<Astralix1> Ok, haven't seen this option yet, but I just had a quir run through to enable the console
<Astralix1> quick
<ganbold_> like these
<ganbold_> fastboot -i 0x2207 oem unlock
<ganbold_> fastboot -i 0x2207 oem unlock_accept
<Astralix1> what does they do?
<ganbold_> enable loading/booting kernel from fastboot
<ganbold_> that is wat I understood
<ganbold_> without flashing
<jas-hacks> anyone know which kernel code attempts to load 'rk30xxnand_ko'
<Astralix1> rk30xxnand.ko is loaded by init script
<Astralix1> it is not loaded by the kernel itself
<jas-hacks> Astralix1: ah, ok
<Astralix1> you need to add that file and the loading line to your init or initrc in initrd (initial ramdisk) that you add to the kernel when creating a boot.img
<Astralix1> gangbold_: unfortunately I need to repair user / group permissions on the local clone of the firefly repo first... takes a minute
<bbelos> Astralix1: i have an rk3188 tablet. do you know if it's at all possible to get uart serial output from the mini usb port?
<Astralix1> Never saw this working
<bbelos> ok, thanks
<Astralix1> most tablets have dedicated testpins for uart access and you need to find them, solder a low volatage capable adapter to it and then can access it from USB
<bbelos> yeah, was hoping to not have to do that :)
<bbelos> attempting to get a kernel compiled for it. still trying to figure out which base to start with
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<Astralix1> That is pretty difficult, if you do not have the exact working kernel sources
<bbelos> yeah, i know
<Astralix1> To get the kernel working, you probably need serial conssole...
<Astralix1> hehe
<bbelos> :)
<bbelos> i have cyanogenmod running well enough with the stock kernel. just wanted to take on the extra challenge
<Astralix1> I made a little case mod to my tablets to add a 3-pole pinheader
<Astralix1> Does anyone know, why samba is constantly dropping out on radxa lubuntu image?
<bbelos> Astralix1: i'm in business. dmesg http://pastebin.com/kahZW7h4
<Astralix1> I see, that you got a kernel log... from serial port?
<bbelos> Astralix1: last_kmsg actually. rebooted into recovery to get it
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<Astralix1> That is probably not enough, as you need to find out all the hardware around the tablet.
<bbelos> yeah, but it's a big step having an active ramconsole
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<McBitter> ohi - anyone been tampering with maskrom recently?
<McBitter> over OTG
<Astralix1> how to tamper with maskrom over otg?
<McBitter> nah - just trying to get maskrom to play nicely
<McBitter> to write data to nand
<McBitter> data is sent to maskrom over usb control
<McBitter> with bmrequesttype = 0x40 and then the magic brequest 0xC (something to do with flashing) and wValue 0x0000
<McBitter> it's a pity that TRM doesn't document it
<Astralix1> McBitter... I would strongly reccomend you to read some basic facts about the mask rom and other involved loaders in the startup prcess of the SOC
<Astralix1> The MASK ROM ist only able to detect an SRAM loader image at certain positions of the supported boot medias.
<Astralix1> It the loads this tiny little piece of code to init SRAM and enable some media features for the rest of the loader
<McBitter> TRM already documents it
<McBitter> currently I'm trying to feed instructions to cpu over otg todo some fun
<McBitter> http://pastebin.com/UqcqxAqz this gets sent to maskrom in usb control mode
<McBitter> ofcourse it's scrambled with rc4
<Astralix1> You mean you disabled all loaders and let the MASK ROM fall through to USB / serial command mode?
<Astralix1> Then may be this might be of interest for you: https://gist.github.com/sarg/5028505
<McBitter> I've already seen that documentation - it uses endpoints and these are supported by stage 2 bootloader
<McBitter> but current state has no endpoints 0x80 and 0x02
<McBitter> just 0x0 as control
<McBitter> maybe some code illustrates this better: http://pastebin.com/Pi4PAPmt
<Astralix1> What is your intention to code at this low level interface?
<McBitter> to get code execute in sram after packet has been sent is 1st goal
<McBitter> other's do no matter
<McBitter> others*
<McBitter> and I was wondering if anybody has got it working
<Astralix1> Hmm... Didn't naobsd already managed to do this with his version of rkflashtool?
<McBitter> as I said - rkflashtool uses 0x80 and 0x02 endpoints (with bulk transfer) it's part of stage2 bootloader capabilities
<McBitter> but maskrom at bare minimum can understand control transfer
<Astralix1> What you like to do is interesting as I would like to have a completely open source uboot, and that would require a DRAM init
<Astralix1> did you setup wireshark and use upgrade_tool to issue some maskrom commands=
<Astralix1> ?
<McBitter> yup
<McBitter> I have packet capture
<McBitter> from upgrade_tool
<McBitter> and some instructions coded in ASM to send data to UART2
<McBitter> just problem is getting that code to execute
<Astralix1> there is probably only one or two commands supported with maskrom...
<McBitter> on chip after transfer
<McBitter> look at that C file I pastebinned
<McBitter> over control transfer
<McBitter> one is commented out
<McBitter> wIndex: 1138
<Astralix1> yes, I see
<McBitter> I'm going to push data sent in first packet with that index to ida
<Astralix1> Did you put the mask rom loader into IDA?
<Astralix1> may be that way round it is more easy to get the supported commands?
<McBitter> in the past yes - but that was way too big codebase to cover
<McBitter> maybe should do it once again
<McBitter> if current approach fails
<Astralix1> The upgrade_tool DB (download boot) command is probably the only stand-alone MASK ROM command.
<Astralix1> All other commands require a loader to ba either already flashed or available on the drive.
<McBitter> hmmm
<McBitter> 1138 contains code for bare minimum init
<Astralix1> AFAIK even UL (upgrade loader) first uses download boot and then uses the new loader to flash itself into NAND / eMMC
<McBitter> 0xdeadbeef when cpu is other than 0x0
<McBitter> lastly LDR PC, =0x6000A998
<Astralix1> I see, you just punch through a binary file to SRAM and let the MASK ROM start it
<McBitter> DMC Rank0 starts at 0x60000000
<McBitter> that is 1 GiB in size
<Astralix1> With RK31/30 you should have two banks of 1GB each
<McBitter> I do
<McBitter> A000_0000
<McBitter> is the beginning of another
<Astralix1> right
<Astralix1> however you need to init the DRAMC first
<McBitter> anyway - I'll keep researching until gotta go into service again :D
<Astralix1> Yes, sure
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<McBitter> Astralix: found better TRM to document bootrom
<Astralix> Which one?
<McBitter> seems to fit the RK3066 bill too
<McBitter> because core is the same
<McBitter> (I run marsboard btw)
<Astralix> I only have 31xx/32xx boards for development. The 3066 is a tablet that uses a very ugly setup... I never did sucessfully setup a kernel for it
<McBitter> oh
<McBitter> btw I did find some USB setup routine in bootrom
<McBitter> but got stuck due to no info :D
<Astralix> The so-called sources for it where completely different from what the kernel showed me in IDA.
<McBitter> so searched for new data on the web
<tizbac> about the tablets , https://github.com/tizbac/mediacomMP82S4 i have got the sources that are used by a lot of chinese tablets
<McBitter> we should get TRM's listed somewhere
<McBitter> useful to guys that do low level work
<Astralix> The kernel ini IDA shows that the DC/DC for core, gpu and some others are driven by RK-PWM units
<McBitter> I that TRM has all the missing data
<McBitter> power, CRU
<McBitter> secure state
<Astralix> McBitter, we should collect them and make them available... But I cannot do that for some certain reasons...
<McBitter> hate lawyers?
<Astralix> That would probably be difficult. But it helps the community more if RK continues to talk to me as kind as they do till now... So I will not take any actions that change this
<McBitter> you can talk with RK? :O
<McBitter> since when these chinese fellas got smart
<McBitter> opening docs == more sales in chips
<Astralix> That is not exactly true, as they have the same problem with each other as we have with them... If you open your docs, the company accross the streets manufactures a copy of you product next week too
<McBitter> I don't really understand all the secrecy there
<McBitter> hmmm
<Astralix> And it is not different if you check docs from TI, Freesscale or others
<McBitter> TRM isn't really a fabrication process
<Astralix> Check the docs
<Astralix> It exactly lists the setup of addresses and layouts of register files by IP
<Astralix> So you can figure out the IPs and then you buy the ARM cor and the IPs and glue them together
<McBitter> oh good point
<Astralix> There are not many things really new and designed by rockchip themselfes
<McBitter> I wonder why people even bother then?
<McBitter> just make the darn silicon
<Astralix> And that is one of the reasons that there is some closed source
<Astralix> They bought the right to use the IP, but not to open the IP to public
<McBitter> I have my eyes on parallella chips too
<Astralix> Or the IP supports codecs that are licened
<karlp> http://rockchip.fr/ has quite a few trms and sheets
<McBitter> codecs IP's are pain in the ***
<McBitter> so it's not really in the hands of RK to make it open?
<Astralix> Yes, with some critical things it is not in the hands of RK
<Astralix> Unfortunately all of HW-decoding and 2D/3D grafix
<Astralix> The encryption of the loader is a different thing
<Astralix> If you cannot guarantee and verify that you can close and secure the whole boot process right up into chromeOS orAndroid, you will not be certified by google
<Astralix> But without certification, you are not allowed to sell you products with Google apps installed
<Astralix> Without that, you will not be selected as SOC manufacturers by many many OEMs
<McBitter> wat
<McBitter> I just started to hate companies once again
<McBitter> so it's up to the community to do the right thing
<McBitter> where nobody can touch us under the flag of GPL
<Astralix> For the Loader it doesn't really bother the open source thinng, as the existent loader is running and booting kernels.
<Astralix> For 2D/3D it is up to ARM to give more than only a bit of Android support libraries
<McBitter> well yeah - but some of us like tho know what is running on the silicon
<McBitter> especially one with GPS installed
<Astralix> lol
<Astralix> It would be a bit tricky to write a working GPS client that sends your location to a network and boots an encrypted system in less than 10kB of code...
<McBitter> company I work for almost signed a contract with defence police (one that does counter intelligence) so yeah... I have my issues
<Astralix> If you can this going, forward your application to certain services and you will be hired for the rest of your life with a pretty good income
<McBitter> I'm already involved in military cyber defence so um yea...
<Astralix> So you should know about the needs of GPS
<McBitter> gov already has my butt
<McBitter> GPS client isn't that big btw
<karlp> depends what the hw is spitting out :)
<Astralix> Hmm... I started programming GPS things on Z80 some... ah... when was GPS set productive?
<Astralix> I must have a real Rockwell developer kit flying around somwhere that is almost 20 years old...
<McBitter> wat
<McBitter> I'm almost as old as that kit then
<Astralix> :)
<McBitter> new year's eve will be watching monitors - oh well
<Astralix> Somwhere in the mid 1980s it was activated, I experimented with it in the naval services in the early 90s and continued to follow its development lateron
<Astralix> Some time this year I was hacking around some Android code for unifying a GPS, Galileo, Baidu and GLONAS receiver driver... But Mediatek Code is so ugly...
<McBitter> :D
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<McBitter> I still don't understand - why ARM is so android oriented
<McBitter> OEM's that produce silicon specially
<jmcneill> $
<Astralix> Oh, ARM is doing what they get the money for
<McBitter> ISA and core designs
<Astralix> But NVIDIA and ATI had to learn the hard way too, so I guess Vivante and ARM will follow
<McBitter> elaborate?
<Astralix> However, there are tendencies in RK that make life more easy, if the promises come true
<McBitter> I've been away for half a year from civilation
<Astralix> As you might know AMD (former ATI) actively supports kernel drivers and NVIDIA does too
<McBitter> linus hates nvidia :D
<McBitter> brb coffee
<Astralix> ARM allows open source interface software to adapt the closed source drivers. ARM cannot write them alone as some things depend on the way of implementation in the final silicon. But ARM supports SOC builders in getting that code
<McBitter> hmmmm
<McBitter> confused
<McBitter> only thing that changes is GPU core address afaik
<McBitter> and core that is used, but that comes from who ever designed that IP
<McBitter> ow and the RAM
<McBitter> and data lines to outside world
<McBitter> surely I forgot something
<McBitter> anyway - you are refering to what exacly with this? Astralix
<McBitter> currently I have AMD mantle in mind
<Astralix> Hmm, there are discussions on the ARM forum at ARM.com
<Astralix> I was just doing some rough walk through throught the issues and reasons for closed code
<McBitter> closed source sucks - we all know that
<McBitter> even more in supercomputing
<Astralix> There are intentions of RK to support more open source structures
<McBitter> because perfomance decrease is awful due to overhead
<Astralix> yes
<McBitter> have you seen what CUDA has become?
<McBitter> so much overhead
<Astralix> lol
<McBitter> openCL ain't any better due to abstractions :D
<McBitter> oh snap - we got too far from arm
<Astralix> This is not my home... I prefer to stay at hardware-software interface and I really prefer to stay in C99 or assembler
<McBitter> C2011 is out ;)
<McBitter> and I gotta stay where I'm told to :D
<McBitter> learn fast or die
<Astralix> hehe...
<McBitter> been the moto for last few years
<Astralix> sure
<karlp> what is really useful and nice in c11? c++11 has heaps for c++ people, but for plain c?
<McBitter> from soldering work to low level to super computing to signal analysis
<Astralix> I didn't say I don't know, I just stated that I prefer
<McBitter> C++ is awful for low level
<McBitter> too many exeption cases n what not
<McBitter> personally I'm starting to like rust language
<Astralix> With C++ and higher you never now what the code will do if you not cover exactly every exception. With C99 it can only do, what you wrote
<McBitter> C++ does way too many things in background
<McBitter> hopefully rust will be new era in computing
<Astralix> And if you can at least read anough assembly to get a rough overview, what the compiler did with your code, you can really efficiently program a device
<McBitter> know what's funny - I can say that I know C, but that is not the case with C++
<McBitter> that beast does many unexpected things
<Astralix> For writing HW/SW interface things like drivers, there is no alternative to C except assembly.
<McBitter> in the future prob rust too
<McBitter> since it's aimed at systems programming
<McBitter> but damn - that compiler is pain... strict syntax so that fewer errors can appear
<McBitter> I wonder when we can get away from ASM
<karlp> hrm, I've seen some very lovely c++ recently for embedded, but it's using c++11 features, and it requires care and art,
<McBitter> stdlib is already huge for low level work anyway
<McBitter> one of the reasons for C
<karlp> you don't need to use stdlib just because you're using c++....
<McBitter> true, but then you might as well use C :D
<karlp> or, you haven't seen the use of c++ perhaps :)
<karlp> anyway, I digress, I was asking what was in c11 that was worth looking at
<McBitter> I measure code by number of ASM lines :D
* karlp replies by refusing to reply
<McBitter> most stuff about C11 is in wiki
<McBitter> that's more or less useful
<Astralix> The best language really prefers on what you need to do and what you prefer
<Astralix> There is no one-and-only thing
<karlp> what?! no one true path to righteousness?! This is the internet!
<Astralix> With C and Cortex you can almost stay completely away from assembly
<karlp> of course there are global truths!
<Astralix> karlp, the only truth is, that there is more than one truth
<McBitter> Astralix: Cortex as in core family?
* karlp observes, the force is wise in this one.
<karlp> McBitter: one of the banner points of cortex is that you can right startup code in C.
<Astralix> I use a lot Cortex M series chips and you can start the without any line of assembly code
<karlp> asm not required! get your coder monkey's cheaper than ever!
<karlp> Astralix: the shame is the vendors that still ship example startup code in asm :(
<Astralix> I bet this can be done with Cortex A series too, but I never tested it
<McBitter> but but I'm in love with ASM :(
<McBitter> all those high perfomance functions
<Astralix> If you know how to read ASM you can program C much more efficiently if you check your compilers results once in a while
<McBitter> I usually trust the optimizer
<McBitter> that fella does magic
<Astralix> If you know how it works, you do write C code that is nearly as efficient as it is in assembler
<McBitter> C with optimizer can be faster than hand written
<McBitter> with generic registers
<McBitter> not the case with NEON / VFP
<McBitter> anyway - I'm in love with CoreSight tech
<Astralix> Yes, there are always exceptions and excuses but again, once in a while, sit back, write some loops and cases and check the results, the try other ways to achieve the same result and check again and wonder...
<McBitter> benchmarking heaven
<karlp> Astralix: only need to do that it if doesn't already meet the performance goals :)
<McBitter> Astralix: you are saying that ASM loop is faster than C?
<Astralix> No...
<McBitter> with max optimizer
<Astralix> No
<Astralix> A system can only optimize if it exactly understands what you do with your code
<Astralix> But these optimizers can only guess according some rules
<Astralix> They cannot look into your brain and optimize from what you think your code needs to do
<McBitter> loops can be very complex :/
<Astralix> Often it is enough to exchange a loop while( x++ < 5) {} by something like x=5; while (x--) {}
<karlp> but I hate people who right things in weird formats and can't show the docs where they recorded the compiler making a bad choice first
<karlp> who _write_ things
<Astralix> ??
<McBitter> Astralix: people rarely write stuff like you do :D
<Astralix> Ok, I perfer code that is written in a way that keeps it readable
<McBitter> optimization is magic
<Astralix> But in the above example, if you use it as it is, the optimizer will make a 2-liner from it
<Astralix> So it doesn't matter
<McBitter> from both?
<Astralix> Probably yes
<McBitter> due to awesomness of ARM conditional instructions
<karlp> test first, iff it has a performance implication that matters
<Astralix> Yes
<Astralix> But if you use the x inside the loop, the magic is over and the two will differ completely
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<Astralix> in the first example it will load x, substract 5 and jump on overrun
<Astralix> in the second example it will just load x and jump on zero
<Astralix> probably it will only test and jump on zero without making a register dirty, not sure if A9 has such a feature
<McBitter> what feature exacly?
<Astralix> So, if the thing you do with x in the loop can be done from 0...4 as well as from 4...0, choose the second way as this spares some calculations every loop
<jmcneill> anybody familiar with rk3188 mmc controller?
<Astralix> to test a variable for beeing </=/>= 0 without really loading it
<Astralix> jmcneill, hopefully a bit
<McBitter> interesting features
<McBitter> I should dig more into belly of a core
<Astralix> As I told, I am not sure if such commands are available.
<McBitter> instructions or features? :D
<jmcneill> Astralix, without dma, polling for fifo ready by looking at fifo cnt and/or fifo count fields, i seem to be getting corrupt data
<jmcneill> been driving me crazy all day
<Astralix> which driver do you try to use?
<jmcneill> one I'm writing for netbsd
<Astralix> isn't there any existing netbsd dwmmc driver available?
<jmcneill> i wrote it
<Astralix> cause you probably only need to handle a few exceptions
<Astralix> you wrote the dwmmc?
<jmcneill> yes
<jmcneill> two days ago
<jmcneill> it seemed ok at 600MHz with one cpu
<jmcneill> started to see issues after I wrote SMP spinup code
<jmcneill> so went back to UP, and wrote CPU freq setting code, and then the issues started appearing in UP mode
<Astralix> are you sure you have an issue with dwmmc itself?
<jmcneill> not entirely
<Astralix> Cause SD/MMC is very layout and frequency critical
<jmcneill> AHB is 48MHz on RK3188?
<jmcneill> which is parent for MMC0 correct?
<Astralix> I have seen many boards where the termination was completely wrong and you can only access with <12MHz
<Astralix> the only person that can answer this question fully true, is mmind00
<Astralix> Let me check if I find the document
<jmcneill> Other odd thing. Datasheet says PWREN=1 to enable power, but it seems to be the reverse?
<Astralix> There had been several issues with dwmmc itself
<Astralix> even it got better compared to older freescale implementations
<mmind00> Astralix: which question do you mean? There is a bit to much backlog right now :-)
<Astralix> the exact clock path of the dwmmc IP
<Astralix> SDMMC and SDIO are clocked by PERI_HCLK
<Astralix> and PERI_HCLK is coming from PERI_ACLK through a divider
<Astralix> and PERI_ACLK is coming from PERI_PLL_CLK through a second divider
<mmind00> yep
<Astralix> looks like the document is correct at that path
<mmind00> personally I'd suggest looking at drivers/clk/rockchip/clk-rk3188.c in a recent mainline kernel, as the whole clock structure is quite readable there
<jmcneill> mostly looking for confirmation that it should be getting 48MHz input
<Astralix> jmcneill, 48MHz is correct
<jmcneill> thanks
<Astralix> For the clocks you can check eMMC specification 4.41 from JEDEC (jedec.org)
<Astralix> 50MHz is allowed for the IP, but the clock chains only support a rate of ~48MHz
<jmcneill> Yeah I'm pretty sure at this point that the clocks are setup correctly.
<Astralix> so you might have to drop speed by board setup
<Astralix> I have seen some boards where no or wrong termination resistors where soldered to the signals of SD/MMC
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<Astralix> Ok, have to leave for bed now. c'ya tomorrow guys
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<jmcneill> Astralix, thanks for that -- I'm able to boot now at 1.6GHz UP with MMC at 24MHz. Now to try SMP kernel.
<naobsd> I think 24MHz is better for first trial
<jmcneill> hi naobsd
<jmcneill> apart from strange data_abort_handler messages when spawning init, smp seems ok now too
<jmcneill> not sure those are related
<naobsd> McBitter: Astralix: you already can send code on mask rom mode https://github.com/linux-rockchip/rkflashtool/commit/6da95a860e856e559310a6d96830eb687c23a132
<naobsd> I cannot remember how sdmmc clocked on RK linux 3.0 kernel
<jmcneill> naobsd:
<jmcneill> clotho# dmesg | grep ^cpu[0123].*MHz
<jmcneill> cpu0 at mainbus0 core 0: 1608 MHz Cortex-A9 r4p0 (Cortex V7A core)
<jmcneill> cpu2: 1608 MHz Cortex-A9 r4p0 (Cortex V7A core)
<jmcneill> cpu3: 1608 MHz Cortex-A9 r4p0 (Cortex V7A core)
<jmcneill> cpu1: 1608 MHz Cortex-A9 r4p0 (Cortex V7A core)
<naobsd> jmcneill: anyway good news
<naobsd> all I can say is
<naobsd> jmcneill: awesome work!
<naobsd> :)
<jmcneill> on the shoulders of giants
<naobsd> I'm still trying to understand about clk-rk3188.c ;)