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<
naobsd >
jmcneill: if you will try SMP on rockchip, current code in rockchip_start.S is useless.
00:22
<
naobsd >
jmcneill: rockchip APs will read/exec code from SRAM
00:24
<
naobsd >
jmcneill: short "jump to our mp startup code" need to be put onto SRAM
00:49
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01:23
<
jmcneill >
hi naobsd
01:23
<
jmcneill >
i just checked in an mmc driver, but it doesn't work yet
01:23
<
jmcneill >
if you have any hints please let me know
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02:22
<
naobsd >
jmcneill: oh, super fast... I see, I'll check it
02:26
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02:48
<
jmcneill >
out of ideas right now
02:56
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03:37
<
ganbold_ >
jmcneill: cool, so you've already booted netbsd
03:39
<
jmcneill >
slowly making progress
03:49
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07:39
<
ganbold_ >
naobsd: what version of ubuntu do you recommend for compiling u-boot?
07:40
<
naobsd >
no recommandation for "compiling u-boot" but I'm usually using ubuntu 14.04 LTS
07:40
<
naobsd >
cross gcc is a part of android sdk
07:55
<
ganbold_ >
ok, before compiline maybe I will try to flash u-boot from link that you gave me
08:01
<
ganbold_ >
with fan firefly is almost like small server :) but compared to Dell servers I have its noise is like nothing
08:05
<
naobsd >
it should be ok without fan...
08:06
<
ganbold_ >
yeah, it is ok
09:30
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10:54
<
daveNL >
hello, my cx 919 ii only connects on b network , not in mixed mode. Any ideas why and can I fix this?
11:13
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12:22
<
ganbold_ >
evening :)
12:22
<
jmcneill >
what's the good word?
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12:27
<
ganbold_ >
how is going with rk3188?
12:27
<
jmcneill >
multi-user, root on usb for now, something wrong with my mmc driver
12:28
<
jmcneill >
"sleep 5" returns in about a second so need to figure that out
12:28
<
ganbold_ >
already multiuser? very cool
12:31
<
jmcneill >
I think it was more or less doing that when I imported it
12:32
<
jmcneill >
Couple small bugs here and there
12:32
<
jmcneill >
Only thing I've done so far is write a broken mmc driver, make reboot support, and fix a L2 setup bug
12:32
<
ganbold_ >
still cool
12:33
<
ganbold_ >
I'm trying to build u-boot on linux, not sure how that works
12:33
<
jmcneill >
ah I can help with that
12:34
<
jmcneill >
running fedora 21 here.. i installed gcc-arm-linux-gnu gcc-c++--arm-linux-gnu and binutils-arm-linux-gnu packages
12:34
<
jmcneill >
set CROSS_COMPILER=arm-linux-gnu-
12:34
<
jmcneill >
then you do I think
12:35
<
jmcneill >
make rk3188_config && make
12:36
<
ganbold_ >
let me try
12:37
<
ganbold_ >
/home/tsgan/gcc-linaro-arm-linux-gnueabihf-4.9-2014.09_linux/bin/arm-linux-gnueabihf-ld.bfd: error: /home/tsgan/gcc-linaro-arm-linux-gnueabihf-4.9-2014.09_linux/bin/../lib/gcc/arm-linux-gnueabihf/4.9.2/libgcc.a(bpabi.o) uses VFP register arguments, u-boot does not
12:41
<
jmcneill >
hm not sure about that toolchain
12:46
<
ganbold_ >
probably I did wrong installing 64 bit linux
12:47
<
jmcneill >
shouldn't matter
12:47
<
jmcneill >
I'm running 64-bit fedora
12:47
<
jmcneill >
github/linux-rockchip/u-boot-rockchip you're trying to build?
12:48
<
ganbold_ >
maybe wrong toolchain
12:49
<
jmcneill >
apparently i don't know how to use git
12:50
<
jmcneill >
rk30xx_config is the target in the u-boot-rk3188-sdcard branch i think
12:51
<
jmcneill >
builds here
12:51
<
jmcneill >
arm-linux-gnu-gcc (GCC) 4.9.1 20140717 (Red Hat Cross 4.9.1-1)
12:52
<
ganbold_ >
let me try ubuntu way :)
12:52
<
jmcneill >
GNU ld version 2.24.0-6.fc21 20140613
13:00
<
ganbold_ >
oh, ubuntu way works :) so too many toolchains one works one not
13:00
<
ganbold_ >
got RK3288UbootLoader_V2.19.01.bin
13:03
<
jmcneill >
do you happen to know how to find cpu freq on rk3188
13:03
<
jmcneill >
i think that's the cause of my delay woes
13:05
<
naobsd >
for u-boot rk3188, use arm-eabi-4.6 in android sdk
13:06
<
naobsd >
for u-boot rk3288, arm-eabi-4.7
13:06
<
jmcneill >
hi naobsd
13:06
<
naobsd >
jmcneill: a9tmr shouldn't be 24MHz
13:07
<
naobsd >
jmcneill: what's current cpu clock?
13:07
<
jmcneill >
where did the magic number that was there before come from?
13:07
<
naobsd >
(I couldn't try latest kernel yet)
13:08
<
jmcneill >
apll is cpu clock right? 600MHz
13:08
<
naobsd >
jmcneill: I guess default cpu clock is 297MHz
13:09
<
naobsd >
actually I don't know well about clock and timer, but it seems a9tmr clock is related to cpu clock
13:10
<
jmcneill >
gimpy said the previous value looked way off
13:10
<
jmcneill >
24MHz lines up with what I saw in datasheet (and what allwinner happens to use as well)
13:10
<
naobsd >
there are some rockchip timer units, hardclock() and timecounter should use it
13:10
<
naobsd >
rockchip timer unit is fixed 24MHz
13:10
<
naobsd >
as far as I know, a9tmr is A9 generic timer
13:11
<
ganbold_ >
jmcneill: did you check freebsd one?
13:11
<
naobsd >
148.5MHz was came from FreeBSD code
13:11
<
naobsd >
it depends on initial cpu clock
13:12
<
naobsd >
(preparing radxa rock...)
13:13
<
jmcneill >
thanks. where do those numbers come from though?
13:14
<
ganbold_ >
not sure :) probably I saw it in some linux src
13:15
<
ganbold_ >
now I need to find out how to stop u-boot
13:16
<
jmcneill >
should be able to add CONFIG_BOOTDELAY to include/configs/<board>.h
13:17
<
naobsd >
ganbold_: modify include/configs/rk*
13:18
<
ganbold_ >
rk_default_config.h?
13:20
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13:28
<
naobsd >
oops, I need to run build.sh tools
13:29
<
ganbold_ >
/usr/bin/arm-linux-gnueabi-ld.bfd:u-boot.lds:1: ignoring invalid character `#' in expression
13:29
<
jmcneill >
unless I'm reading cmu regs wrong, here's what I see
13:29
<
jmcneill >
APLL: 600000000 Hz
13:29
<
jmcneill >
GPLL: 768000000 Hz
13:29
<
jmcneill >
CPU: 200000000 Hz
13:29
<
jmcneill >
AHB: 48000000 Hz
13:29
<
jmcneill >
A9PERIPH: 150000000 Hz
13:32
<
naobsd >
anyway, rk fixed timer unit should be used...
13:32
<
ganbold_ >
interesting, changed PREBOOT, but now it complains
13:34
<
naobsd >
ganbold_: please use officially supported toolchain
13:36
<
jmcneill >
safe to assume PX2 CMU is the same as RK3188 or no?
13:37
<
ganbold_ >
now need to try upgrate_tool
13:37
<
jmcneill >
CRU yeah sorry. Do you have RK3188 CRU docs?
13:37
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13:41
<
naobsd >
no, only I can see is linux kernel/u-boot code
13:41
<
naobsd >
it's cryptic...
13:42
<
jmcneill >
well, if I use the values above, I get a panic in dwcotg driver at boot
13:43
<
ganbold_ >
./upgrade_tool ul RK3288UbootLoader_V2.19.01.bin
13:43
<
ganbold_ >
Loading loader...
13:43
<
ganbold_ >
Support Type:RK320ALoader ver:2.19Loader Time:2014-12-27 21:36:18
13:43
<
ganbold_ >
Creating Comm Object failed!
13:43
<
ganbold_ >
tsgan@tsgan-virtual-machine:~/Linux_Upgrade_Tool_v1.21$
13:45
<
naobsd >
ganbold_: try sudo
13:46
<
naobsd >
you can add
13:46
<
ganbold_ >
Hit any key to stop autoboot: 0
13:46
<
ganbold_ >
no boot delay
13:46
<
naobsd >
SUBSYSTEM=="usb", ATTR{idVendor}=="2207", MODE="0666", GROUP="plugdev"
13:47
<
naobsd >
to /etc/udev/rules.d/51-android.rules then run "udevadm control --reload-rules"
13:47
<
naobsd >
then you can avoid sudo
13:48
<
ganbold_ >
it is ok, sometimes I forgot sudo
13:49
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13:49
<
naobsd >
jmcneill: I think register map is same, but bit mask is different
13:53
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13:56
<
ganbold_ >
got delay at u-boot :)
13:56
<
ganbold_ >
small progress
13:57
<
naobsd >
oops, netbsd.bin doesn't boot :(
13:57
<
naobsd >
only @ABC12-DFG01H1IJKLMZ
14:00
<
jmcneill >
I broke it already?
14:02
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14:05
<
naobsd >
I think it's my environment issue...
14:06
<
jmcneill >
naobsd: please use officially supported toolchain :)
14:06
<
naobsd >
I think "./build.sh -j 4 -m evbearmv7hf-el -U tools kernel=ROCKCHIP" should work...
14:08
<
ganbold_ >
so fastboot -i 0x2207 oem unlock doesn't finish
14:08
<
ganbold_ >
maybe works this way
14:11
<
naobsd >
ah, booted now
14:11
<
naobsd >
it seems load to RAM is broken...
14:11
<
naobsd >
fastboot -i 0x2207 oem unlock
14:11
<
naobsd >
fastboot -i 0x2207 oem unlock_accept
14:11
<
naobsd >
run 2 commands
14:11
<
ganbold_ >
those command prints ... and never finishes
14:12
<
naobsd >
at first please try my u-boot binary
14:12
<
naobsd >
I confirmed it
14:17
<
naobsd >
sdmmc0: couldn't enable card: 60
14:18
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14:21
<
ganbold_ >
maybe fastboot version is not correct
14:21
<
ganbold_ >
which fastboot?
14:22
<
naobsd >
android-tools-fastboot 4.2.2+git201
14:23
<
naobsd >
oh I should try sd boot, not nand boot...
14:27
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14:28
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14:29
<
ganbold_ >
cannot find -lusb-1.0
14:33
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14:33
<
ganbold_ >
fastboot -i 0x2207 oem unlock_accept
14:33
<
ganbold_ >
FAILED (remote: oem unlock not requested)
14:33
<
ganbold_ >
finished. total time: 0.003s
14:33
<
naobsd >
ganbold_: did you run 1st command just before 2nd command?
14:35
<
pacopad >
i got ugly network perfs with my rk3288 board , iperf says that
14:35
<
pacopad >
[ 3] 6.0- 8.0 sec 512 KBytes 2.10 Mbits/sec
14:35
<
pacopad >
what could i check ?
14:37
<
ganbold_ >
naobsd: do you zImage somewhere?
14:37
<
naobsd >
ganbold_: well?
14:38
<
ganbold_ >
well, wanted to make sure it works
14:39
<
ganbold_ >
FAILED (remote: already unlocked)
14:39
<
ganbold_ >
so I guess it is unlocked
14:39
<
naobsd >
ganbold_: then you can use fastboot boot
14:39
<
ganbold_ >
yeah, I wanted to try linux zImage
14:39
<
ganbold_ >
I don't have it now
14:40
<
naobsd >
you may send garbage just for checking fastboot boot...
14:41
<
naobsd >
I have some zImages but I'm not sure which one is "boot correctly"
14:43
<
naobsd >
no warranty
14:43
<
naobsd >
even if it gets oops, "fastboot boot" works.
14:44
<
naobsd >
jmcneill: did you see sdmmc0: host_ocr 0x00300000 sdmmc0: card_ocr 0x00ff8000 sdmmc0: sdmmc_mem_send_if_cond: error=0, ocr=0x1aa sdmmc0: sdmmc_mem_send_op_cond: ocr=0x40300000
14:45
<
ganbold_ >
Linux version 3.18.0-next-20141211+ (fun@build) (gcc version 4.9.2 20140904 (prerelease) (crosstool-NG linaro-1.13.1-4.9-2014.09 - Linaro GCC 4.9-2014.09) ) #1 SMP Sat Dec 20 00:15:29 JST 2014
14:45
<
ganbold_ >
seems working
14:45
<
jmcneill >
naobsd: nope
14:46
<
naobsd >
jmcneill: it seems some initial commands are working
14:46
<
jmcneill >
i get an immediate timeout
14:46
<
jmcneill >
did you back out any of my clock changes?
14:46
<
naobsd >
I reverted last one
14:46
<
jmcneill >
which was that
14:46
<
naobsd >
but I still got timeout (60)
14:47
<
naobsd >
timer_clk is 24MHz
14:47
<
jmcneill >
you think it should be 148.5?
14:47
<
ganbold_ >
interesting now where is boot delay? :)
14:49
<
ganbold_ >
boot delay is gone :) fun
14:50
<
ganbold_ >
how to boot back to android? it goes directly to linux
14:51
<
naobsd >
jmcneill: I think it's different issue... let me check with latest version
14:52
<
jmcneill >
There must be something I'm missing here. I can't seem to figure out these clocks.
14:53
<
naobsd >
ah, it's somehow related...
14:54
<
naobsd >
with latest change, first sdmmc_io_send_op_cond: ocr = 0 got sdmmc_io_send_op_cond: error = 60
14:54
<
jmcneill >
there are a few reasons for timeout
14:55
<
jmcneill >
either controller sends response timeout irq, or 10 second timer expires (or < 10 seconds if timer freq is incorrect)
14:55
<
naobsd >
well sorry
14:56
<
naobsd >
I misread something
14:56
<
jmcneill >
600MHz and 768MHz seem correct for APLL and GPLL, not sure how to derive cpu speed from that.
14:57
<
naobsd >
sdmmc_io_send_op_cond always timed out
14:58
<
naobsd >
difference is sdmmc_mem_send_op_cond
14:58
<
jmcneill >
due to irq or after 10 seconds?
14:58
<
jmcneill >
look for 'rint' in output
14:58
<
jmcneill >
sdmmc_io_send_op_cond: ocr = 0
14:58
<
jmcneill >
dwcmmc0: mint 0x100 rint 0x100
14:58
<
jmcneill >
dwcmmc0: mint 0x4 rint 0x4
14:58
<
jmcneill >
dwcmmc0: dwc_mmc_exec_command: rint 0x104
14:58
<
jmcneill >
sdmmc_io_send_op_cond: error = 60
14:59
<
jmcneill >
bit 8 is request timeout
14:59
<
jmcneill >
bit 3 is command done
15:01
<
jmcneill >
_APLL_SET_CLKS(600000, 1, 50, 2, 1, 4, 4, 3, 2, 4, 2),
15:01
<
jmcneill >
from u-boot
15:01
<
naobsd >
dwcmmc0: dwc_mmc_exec_command: rint 0x104
15:02
<
jmcneill >
that matches what i see -- rockchip_pll_get_rate: 0 0x4: nr=1 no=2 nf=50
15:02
<
jmcneill >
APLL: 600000000 Hz
15:02
<
naobsd >
and latest timer clk change should be unrelated
15:02
<
jmcneill >
_GPLL_SET_CLKS(768000, 1, 64, 2, 4, 2, 4),
15:02
<
jmcneill >
rockchip_pll_get_rate: 0x30 0x34: nr=1 no=2 nf=64
15:02
<
jmcneill >
GPLL: 768000000 Hz
15:03
<
jmcneill >
not sure why it's picking up the first gpll rate and the last apll rate
15:03
<
mmind00 >
jmcneill: apll + gate_gpll_cpu end in a mux_core which is followed by a divider which then results in the real cpu frequency
15:04
<
mmind00 >
jmcneill: but I haven't read the full backlog, so am not really sure what information you actually looking for
15:04
<
naobsd >
mmm, u-boot on sd doesn't work, oops
15:04
<
naobsd >
what happend...
15:05
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15:05
<
jmcneill >
mmind00: you're following but i'm not entirely clear on this yet
15:06
<
naobsd >
I want to sleep...
15:06
<
jmcneill >
given apll rate from apll_con0+apll_con1, apply divider from where?
15:07
<
jmcneill >
clksel0_con a0_core_div ?
15:07
<
jmcneill >
a9_core_div
15:08
<
naobsd >
unreliable sd card!
15:10
<
mmind00 >
jmcneill: register is: RK2928_CLKSEL_CON(0), mux between apll and gpll is at bit 8 and the core_div at bit 9 with a mask of 0x1f
15:10
<
mmind00 >
jmcneill: at least for the rk3188
15:11
<
jmcneill >
ah i was looking at bit 0 for core_div (based on PX2 TRM), sec
15:12
<
mmind00 >
jmcneill: there are some differences between the 3066 and 3188 clock trees
15:13
<
jmcneill >
what should I expect the rate to be? given apll of 600MHz anything > 1 will seem strange
15:13
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15:15
<
jmcneill >
rockchip_pll_get_rate: 0 0x4: nr=1 no=2 nf=50
15:15
<
jmcneill >
rockchip_cpu_get_rate: clksel_con0=0x42
15:15
<
jmcneill >
CPU: 600000000 Hz
15:15
<
mmind00 >
jmcneill: correct ... in the linux kernel it is just used to prevent frequency issues with cpufreq operations
15:16
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15:17
* ganbold_
thinks maybe enough for today for him
15:17
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15:18
<
naobsd >
jmcneill: with or without "timer_clk is 24MHz" change,
15:19
<
jmcneill >
I want to fix that.
15:19
<
naobsd >
jmcneill: I can see some response on sdmmc_mem_send_op_cond
15:19
<
jmcneill >
Does 150MHz sound more reasonable?
15:19
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15:19
<
naobsd >
jmcneill: and error is
15:19
<
jmcneill >
a9tmr is a9periph right?
15:19
<
naobsd >
dwcmmc0: dwc_mmc_exec_command: rint 0x104
15:20
<
naobsd >
sdmmc0: sdmmc_mem_send_op_cond: error=60, ocr=0
15:20
<
naobsd >
sdmmc0: couldn't send memory OCR
15:20
<
jmcneill >
104 means the controller sent a timeout irq in response to the sdmmc command
15:20
<
jmcneill >
1 is "response timeout", 4 is "command done"
15:20
<
jmcneill >
likely the clock is setup incorrectly
15:21
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15:22
<
jmcneill >
your uboot sources seem to calculate the divisor based on ahb rate, but there is a separate mmc0 rate
15:22
<
jmcneill >
again, at least in px2 trm
15:22
<
jmcneill >
AHB: 48000000 Hz
15:22
<
jmcneill >
MMC0: 256000000 Hz
15:23
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15:25
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15:26
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15:27
<
naobsd >
a9tmr is core timer
15:27
<
naobsd >
it's not rk timer unit
15:28
<
naobsd >
well, that u-boot is Rockchip's u-boot ;)
15:29
<
jmcneill >
just trying to figure out exact rate for a9tmr
15:30
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naobsd >
clksel_con1 value?
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jmcneill >
not sure, why?
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naobsd >
well, sorry
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naobsd >
good night
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jmcneill >
mmc works now, yay
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