<azonenberg>
I am going to be doing the first two masks by contact lithography on a whole wafer (they dont need to be very accurate and will be the same for all dies)
<R0b0t1>
Which program is that?
<azonenberg>
Glade
<azonenberg>
free but closed source
<azonenberg>
none of the open tools were to my liking so far, i'm still searching
<R0b0t1>
Are you at the point where you are actually going to etch a full wafer? What's on the chips?
<azonenberg>
not yet fully designed
<azonenberg>
Ok, here's the process overview
<azonenberg>
Spin coat resist, pattern "dicing" mask (blue rectangle in the background, full chip) by contact litho over a full 2 inch wafer
<azonenberg>
This will leave lines (the space between the white and blue outlines) of photoresist with space between them wher ethe dies are
<azonenberg>
Evaporate 1000nm of Cr on both sides of the wafer
<azonenberg>
Lift off in acetone
<azonenberg>
this will result in the back of the wafer being solid Cr and the front being Cr over dies and bare silicon over the spaces between them
<azonenberg>
Etch in hot KOH for half an hour or so
<azonenberg>
actually more like 45 mins
<azonenberg>
Enough to go down about 100 microns
<azonenberg>
So now i have Cr over unetched Si on the front and back of the dies and trenches 100um deep between them
<soul-d>
sounds like fun
<azonenberg>
Next step is to do a second contact mask
<azonenberg>
the pink "backside" mask
<azonenberg>
align to the edge of the dies
<azonenberg>
and etch the Cr in HCl : H2O2
<azonenberg>
then return to the KOH
<azonenberg>
now i am etching both in the center of the die and between the dies
<R0b0t1>
So your photoresist is positive, turn that into a negative of Cr, then etch?
<azonenberg>
but the trenches are 100um deeper
<soul-d>
see lots of  fun chemical processes
<azonenberg>
R0b0t1: I havent figured out all of the polarities for the masks yet
<azonenberg>
in the CAD right now, filled areas are to not be etched
<R0b0t1>
Well, photo -> chrome -> etch?
<azonenberg>
i may invert them before fab
<azonenberg>
depending on where i do liftoff
<azonenberg>
anyway so i then KOH a second time
<azonenberg>
until the dies separate
<azonenberg>
At this point, i have 76 loose chips
<azonenberg>
500um deep
<azonenberg>
with 400um deep rectangular holes in the backs
<azonenberg>
From now on, processing is done by projection litho one die at a time
<azonenberg>
as the process is a little more experimental (and features are smaller)
<azonenberg>
I then pattern the "fingers" mask
<azonenberg>
Which i havent finished designing
<soul-d>
ok so  you made  the "base"  first ?
<R0b0t1>
So is this etch of the whole wafer to get you separate chips?
<azonenberg>
R0b0t1: Yes, as well as to thin the dies in the center
<R0b0t1>
ah okay
<azonenberg>
leaving a full-thickness ring around the thin part for easier handling
<azonenberg>
Then i do the finger mask which is my actual MEMS geometry
<azonenberg>
garden-variety comb drive
<azonenberg>
20um fingers at 20um spacing
<azonenberg>
Etch this into the top surface
<azonenberg>
While leaving the 400um deep hole unmasked
<azonenberg>
So i'm now etching down and up simultaneously
<azonenberg>
They'll meet around 50um from the top of the die
<azonenberg>
leaving 20um wide and 50um tall fingers
<azonenberg>
I then deposit an insulator - either spin on glass, thermal oxidation, or something TBD
<azonenberg>
evaporate metal (aluminum most likely)
<azonenberg>
and pattern the metal1 mask to separate the stator from the rotor
<azonenberg>
as well as adding probe pads that i can test the device with
<azonenberg>
Sonud like a reasonable process?
<R0b0t1>
.
<R0b0t1>
lol
<soul-d>
sounds like fun :)
<R0b0t1>
It makes sense, but seems rather convoluted
<R0b0t1>
But right now you are only using one type of silicon?
<R0b0t1>
What about making transistors and having to use the P and N silicon?
<azonenberg>
R0b0t1: I am only doing MEMS atm so doping is unimportant
<azonenberg>
i think all of the wafers i have now are P type boron doped
<azonenberg>
When i get to transistors, i will be using spin coated dopants and diffusion
<azonenberg>
spin coat a layer of doped SiO2, photoresist over that, pattern
<azonenberg>
etch oxide in 3% HF
<azonenberg>
backfill with undoped oxide
<azonenberg>
Cook at ~1100C to diffuse dopants into the silicon
<azonenberg>
strip oxide
<soul-d>
ill leave the HFÂ Â to you though
<azonenberg>
deposit field oxide
<azonenberg>
soul-d: 3% is actually not THAT bad, though you still want to be careful
<azonenberg>
i buy it at the local grocery store
<azonenberg>
its an off-the-shelf rust remover
<soul-d>
mmm ?
<azonenberg>
whink brand rust stain remover
<azonenberg>
brown plastic bottle
<azonenberg>
1.5-3% HF
<soul-d>
ok lol cool
<soul-d>
yeah ,y shed is chemical hazard anyhow
<azonenberg>
At the same time, you want to wear gloves and preferably a lab coat
<azonenberg>
as with any acid
<soul-d>
got them  and  full face shield
<soul-d>
abec1 filters
<azonenberg>
Yep, me too
<azonenberg>
What i am actually working on setting up is local exhaust for solvents
<azonenberg>
i have a 6" duct fan but have to build the rest of the hood
<azonenberg>
In any case its 4:30 in the morning and i have homework due at 1700
<azonenberg>
and class at 1400
<azonenberg>
I'd like to be somewhat awake for them
<soul-d>
hehe
<azonenberg>
so i'm off to get some sleep
<soul-d>
goodnite
<azonenberg>
AFKs: 503 Geek Temporarily Unavailable\r\nX-Server: azonenberg\r\nRetry-After: 21OCT2011 1030EDT\r\n\r\nThe requested geek is asleep. Your request should be repeated in six to eight hours.
<azonenberg>
And who said anything about night? It's the morning here :p
<soul-d>
heh true  nasty habbit i have to  night time seems to work better
<reportingsjr>
azonenberg: I would say it's /almost/ morning here, haha
<azonenberg>
doing the litho for the first mask today, then the evaporation and liftoff monday or tuesday (was gonna be today but was delayed by homework)
<azonenberg>
two contact masks on the whole wafer, then dicing and two projection masks on each die
<soul-d>
you still where able to do homework  ? :D
<azonenberg>
soul-d: Got everything done on time, yes
<azonenberg>
Skipped my one class of the day but its boring
<azonenberg>
its the EE version of stuff i already learned in CS
<azonenberg>
But i need credits in my schedule
<soul-d>
lol
<soul-d>
coulnd you jsut pretend to be there and do saomthing else
<azonenberg>
i took so many CS classes as an undergrad that i'm having problems taking enough as a grad
<azonenberg>
all of the interesting ones i already took
<azonenberg>
so i have to find another dozen classes to take over the next few years
<azonenberg>
i dont think there are 12 classes offered by the department i havent taken :p
<azonenberg>
and especially if you count ones like "numerical methods for differential equations" that are super math heavy?
<azonenberg>
So i'm starting to branch out into other departments out of necessity
<azonenberg>
unfortunately, this often results in overlap
<azonenberg>
and by the time you figure out you're going to learn nothing in the class, and it's too late to add a new one and drop this one, you're stuck with it
<soul-d>
heh hard to get motivated
<azonenberg>
lol
<azonenberg>
funny thing is, this is the only EE class i've taken to date
<azonenberg>
but its all stuff i learned in CS
<azonenberg>
Anyway so as soon as it gets dark enough that i can do litho without sunlight frying my wafer, i'm going to do a photoresist coating followed by my first attempt at full-wafer contact litho
<azonenberg>
Good news, the feature size is huge lol
<azonenberg>
smallest geometry on this mask is 200 um
<azonenberg>
should probably look into buying professionally made masks just once to see how good they are