<bluezinc>
Famine: if you need a hand with the public shaming, let me know.
<Famine>
bluezinc, haha i'm still trying to find the words to reply to the email, i'm trying to go for educational instead of "how can you be so dumb yet work as application engineers"
<Famine>
the pulse gen output is kind of ugly, but it was just a random tunnel diode, piece of coax for a cap, and the gnd lead / stray inductance as the inductor
<azonenberg>
oook well it took me all night thanks to some stupidity on my end
<azonenberg>
But my homegrown ILA is now probing the internal GMII bus in an FPGA test system
<azonenberg>
So when I get home from work tomorrow I can write a GMII protocol decoder to add alongside the 10/100 ethernet PHY decoders i already have
<azonenberg>
More importantly i have the infrastructure to start adding decodes for lots of protocols that use more than 4 bits of data
<azonenberg>
And at some point i really need to start adding support for decodes in plugin modules (scopehal-apps:16) as i have a few proprietary protocols for work etc that i'd really like to write decodes for
<azonenberg>
but maintaining a private fork of scopehal while also developing on mainline would be a pain in the butt
<tnt>
btw, how is / is there support for streaming captures ? (and/or trigger on streaming captures)
<azonenberg>
Define streaming
<azonenberg>
as in displaying waveforms as they are still being acquired? in a rolling fashion?
<tnt>
Yes.
<tnt>
Things like the cheap analyzer that don't really have a buffer and you just manually start / stop the acquisition.
<azonenberg>
As of now, no. I assume you're imagining a low bandwidth acquisition device of some sort that sends all data to you, then you filter ex post facto?
<azonenberg>
because even 8 bits @ 1 Gsps 1ch/250 Msps 4ch, aka a cheap rigol, is almost enough to saturate 10GbE
<tnt>
Yup, I was thinking of high speed (like 100 Msps) capture of 2 bit for USB but over long periods and where most of it is idle (and so it's streamed compressed) but it can take a fairly long capture to get the whole sequence you want to analyze.
<azonenberg>
file a ticket under scopehal first and we'll think about means for capturing such stuff. Some UI tweaks to scopehal-apps will be needed too, but i want to figure out the APIs first
<azonenberg>
Good idea though
<azonenberg>
also i'm off to sleep, we ca ntalk more in the morning
<_whitenotifier-3>
[scopehal-apps] azonenberg pushed 1 commit to master [+0/-0/±1] https://git.io/Jva3X
<_whitenotifier-3>
[scopehal-apps] azonenberg cda45f6 - WaveformArea: better rendering of buses with lots of duplicate values in a row
<_whitenotifier-3>
[scopehal-cmake] azonenberg pushed 1 commit to master [+0/-0/±3] https://git.io/Jva31
<_whitenotifier-3>
[scopehal-cmake] azonenberg c3b3b7c - Updated to latest submodules
<_whitenotifier-3>
[scopehal-apps] azonenberg opened issue #76: Add radix option for displaying digital bus waveforms - https://git.io/JvaZG
<_whitenotifier-3>
[scopehal-apps] azonenberg labeled issue #76: Add radix option for displaying digital bus waveforms - https://git.io/JvaZG
<_whitenotifier-3>
[scopehal-apps] azonenberg labeled issue #76: Add radix option for displaying digital bus waveforms - https://git.io/JvaZG
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<awygle>
azonenberg: is there an overview doc of "the scopehal ecosystem", or is the document "ask azonenberg"?
<awygle>
or RTFSC i guess
<azonenberg>
awygle: there is the manual wrt use of glscopeclient
<azonenberg>
there is no other documentation yet
<azonenberg>
two weeks ago, there was no manual either
<azonenberg>
so this is progress
<awygle>
lol
<awygle>
nice
<awygle>
azonenberg: any chance you could give me the overview? how do the bits fit together?
<awygle>
from the perspective of "i have a basic ila i want to hook up to a ulpi bus and troubleshoot ulpi with it"
<azonenberg>
awygle: you'd need to implement a new class derived from Oscilloscope that implements the necessary functions
<azonenberg>
AntikernelLogicAnalyzer is probably a good reference to use
<azonenberg>
then add code to glscopeclient/main.cpp to instantiate that class when the appropriate driver is requested
<azonenberg>
note that i do not yet have proper APIs or UI for configuring complex triggers (i.e. LA conditions as opposed to rising edge on an analog channel etc)
<azonenberg>
so you will want to hard code the trigger config in your driver for the short term
<azonenberg>
this will change in the next day or two and is under active development
<azonenberg>
the setup | trigger | $scope menu currently pops up a dialog for trigger config that i haven't populated yet
<azonenberg>
which will call APIs i haven't created yet
<azonenberg>
if you want to get up and running right now, and are working on a chip that has a systemverilog compatible toolchain and a free UART, consider using my ILA instead?
<azonenberg>
it's open source and at least mostly works :p