sb0 changed the topic of #m-labs to: https://m-labs.hk :: Mattermost https://chat.m-labs.hk :: Logs http://irclog.whitequark.org/m-labs
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<mtrbot-ml> [mattermost] <sb10q> whitequark: smoltcp ipv6 seems to work fine :) nice
<mtrbot-ml> [mattermost] <sb10q> cr1901_modern: have you ever used IPsec on windows?
<cr1901_modern> sb10q: I'm afraid not
<mtrbot-ml> [mattermost] <sb10q> the linux configuration with ``ip xfrm`` seems reasonable enough (even if poorly documented), but idk how painful it is on windows
<mtrbot-ml> [mattermost] <sb10q> the idea is to put devboards on a v6 network with ipsec
<cr1901_modern> https://docs.microsoft.com/en-us/windows/win32/fwp/ipsec-configuration Looks like setting it up on Windows is something meant for system admin rather than an end user.
<mtrbot-ml> [mattermost] <sb10q> yeah well, even linux seems to be command-line only, the GUIs don't seem to support it
<mtrbot-ml> [mattermost] <sb10q> but, this is for *development* boards, after all
<cr1901_modern> Without knowing exactly what the config should look like for your use case, this doesn't look _too_ bad to set up for an end user: https://thebackroomtech.com/2019/05/13/how-to-configure-ipsec-on-windows/
<mtrbot-ml> [mattermost] <sb10q> yeah this doc seems confusing
<cr1901_modern> A bit more complicated than, say, making a network bridge (which I've done before to get an x86 VM to be seen across the network)
<mtrbot-ml> [mattermost] <sb10q> probably ESP tunnel as per slide 14 of http://data.pavlix.net/devconf/2012/pavel-simerda-ipsec.pdf
<mtrbot-ml> [mattermost] <sb10q> as I understand it, this is the only configuration where the router adds/removes encryption and the packets are cleartext on the private LAN
<cr1901_modern> >Mandatory part of IPv6 stack Oh, wheee...
<cr1901_modern> that sounds like an absolute blast to implement
<mtrbot-ml> [mattermost] <sb10q> yeah they made a mess of it
<mtrbot-ml> [mattermost] <sb10q> but that config with ip xfmr seems okay
<cr1901_modern> did wq implement ipsec for smoltcp, or is the idea that you want the encryption to be gone by the time it reaches a smoltcp device?
<mtrbot-ml> [mattermost] <sb10q> no
<mtrbot-ml> [mattermost] <sb10q> ipsec in the device sounds complicated, so the idea is to handle the encryption entirely in the linux router
<cr1901_modern> Hrm, while this doesn't really affect you or me, this sounds like something that indeed cannot be configured on consumer ipv6 router :/
<mtrbot-ml> [mattermost] <sb10q> it can be configured on the lab router, and it can be configured on linux clients. the consumer home routers don't need to be involved
<mtrbot-ml> [mattermost] <sb10q> the question is windows...
<cr1901_modern> It looks like Windows Server provides a GUI and it's _slightly_ complicated to set up, but not a nightmare
<cr1901_modern> but I don't have Windows Server, and I don't think I could easily dupe your setup here
<cr1901_modern> sb10q: From reading ipv6now.com, ESP is the header you want; the Authentication header doesn't provide encryption
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<ZirconiumX> If I want to convert an Elaboratable that takes in Records to Verilog, do I need to name the fields of the records individually as ports?
<cr1901_modern> yes, although maybe a pass to abstract that away would be low-hanging fruit?
* ZirconiumX stares at the 16x20 + 36 = 356 fields they have to individually name
<ZirconiumX> Yeah, hmm
<ZirconiumX> (16 pixel pipelines, 20 fields per pipeline, plus 36 values common to all pipelines)
<ZirconiumX> At least each pipeline is not *too* awful
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<emily> ZirconiumX: you can probably do that pretty easily with some metaprogramming?
<ZirconiumX> Sure, although I know for a fact Quartus won't even bother trying to synthesise it directly
<ZirconiumX> Yosys should be okay with it though
<ZirconiumX> Hopefully.
<emily> I mean, Python metaprogramming
<ZirconiumX> Yeah, but that doesn't help with things like the constant fields
<tpw_rules> ZirconiumX: what is your display?
<ZirconiumX> NTSC/PAL, mostly
<ZirconiumX> tpw_rules: ^
<tpw_rules> oh
<tpw_rules> i want to sit down soon and play with my icebreaker and led panels
<ZirconiumX> tpw_rules: I'm going to use VGA, but it shouldn't matter too much
<tpw_rules> is this like a 3d pipeline or something?
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<ZirconiumX> Yes, tpw_rules (don't be afraid to ping me)
<ZirconiumX> So, I'll admit I'm running on battery power
<_whitenotifier> [nmigen] RobertBaruch opened issue #255: Consider supporting (* keep *) - https://git.io/JeBQl
<ZirconiumX> But I think I've created a monster
<ZirconiumX> Because nMigen takes *thirty-five seconds* to produce Verilog
<ZirconiumX> And it produces 3.2MiB of Verilog. Mmm.
<ZirconiumX> And somehow synthesises to fewer LUTs than a single pipeline.
<ZirconiumX> This smells like a bug in my code.
<ZirconiumX> Well, okay, two more LUTs than a single pipeline
<ZirconiumX> And I'm rambling, I'll shut up now
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<_whitenotifier> [nmigen] RobertBaruch opened issue #256: Consider adding a --platform (or -p) option to generate - https://git.io/JeB5p
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<_whitenotifier> [nmigen] whitequark commented on issue #255: Consider supporting (* keep *) - https://git.io/JeBNO
<whitequark> ZirconiumX: nmigen's elaboration process is currently actually quite slow
<whitequark> I made a design mistake that should be relatively easy to fix that results in that
<ZirconiumX> Okay, fair
<_whitenotifier> [nmigen] whitequark commented on issue #256: Consider adding a --platform (or -p) option to generate - https://git.io/JeBNn
<_whitenotifier> [nmigen] cr1901 commented on issue #256: Consider adding a --platform (or -p) option to generate - https://git.io/JeBNR
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<_whitenotifier> [nmigen] RobertBaruch commented on issue #256: Consider adding a --platform (or -p) option to generate - https://git.io/JeBAm
<_whitenotifier> [nmigen] whitequark commented on issue #256: Consider adding a --platform (or -p) option to generate - https://git.io/JeBAG
<ZirconiumX> Okay, so, evidently I'm doing the metaprogramming wrong, because inspecting the output Verilog shows that I'm not getting 16 of my PIPE Records, but only 1.
<ZirconiumX> Because nMigen thinks the records refer to the same instance? Is this a bit where I need to deep-copy?
<ZirconiumX> Well, copy.deepcopy infinitely recurses
<whitequark> you can't use copy.deepcopy on any nmigen objects currently
<whitequark> well, maybe you can, but it's not supported
<ZirconiumX> So how do I create N instances of a Record?
<cr1901_modern> Can you create a MCVE that shows what you want to do?
<whitequark> you call Record N times
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<ZirconiumX> whitequark: Thanks. It seems I don't understand Python's semantics very well here
<whitequark> that does happen
<ZirconiumX> cr1901_modern: Well, I made an MCVE; still want it?
<cr1901_modern> ZirconiumX: Thanks :). Sadly I had an energy crash between writing that and your post, so I'll have to study it later
<ZirconiumX> Okay, take care of yourself
<ZirconiumX> (the MCVE is technically fixed, but in the comments I mention where the issue was)
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<_whitenotifier> [nmigen] RobertBaruch commented on issue #256: Consider adding a --platform (or -p) option to generate - https://git.io/JeBhW
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<_whitenotifier> [nmigen] whitequark commented on issue #256: Consider adding a --platform (or -p) option to generate - https://git.io/JeBh6
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