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GitHub-m-labs >
[artiq] klickverbot commented on issue #1148: It's also the electrical signal ordering. But yes, the current state is not ideal, especially as that makes it easy to miss that the panel is in fact zero-indexed as IO1 is top left (a favourite gotcha for new users here). [Still on the way back to Oxford, I'd look up the current revision to confirm if I could.]
https://github.com/m-labs/artiq/issues/1148#issuec
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artiq/master 4d73fb5 Robert Jördens: grabber: only advance when DVAL
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