sb0 changed the topic of #m-labs to: ARTIQ, Migen, MiSoC, Mixxeo & other M-Labs projects :: fka #milkymist :: Logs http://irclog.whitequark.org/m-labs
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<sb0> rjo, why do machined ion traps typically need a large rf resonator cavity whereas QMS/RGAs don't?
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<whitequark> sb0: regarding my QMS idea, there were two concerns
<whitequark> first, in a typical QMA, the higher you want to get in m/z, the higher is the voltage. whereas if you vary frequency, the highest m/z ratios correspond to the lowest frequencies, conveiniently also where DDS resolution is maximal
<whitequark> erm, those are really two reasons
<whitequark> i.e. the first one is instead of needing a very high voltage for high m/z (or a smaller trap, in which case you lose in absolute ion current), you merely need a class A amp and then a very precise but fairly low frequency
<sb0> whitequark, but you want resonant amps.
<sb0> those things have hundreds of pF capacitance
<whitequark> so the second reason was that you can keep the absolute voltage very low
<whitequark> one of the papers I've read claims you can get by with 10V/100V dc/ac voltages
<whitequark> with this class A amp and 3mm rod diameter, I can go up to about 500V, if I recall my old calculations correctly
<sb0> 100Vac@1MHz is a lot of power to force through 100's pF if you don't use a resonant design
<whitequark> sure, and that apex amp can drive it
<whitequark> it's somewhat of a brute force approach, trading off one set of problems for another
<whitequark> if you do a resonant converter, you have to deal with like 5 to 15kV of RF voltage
<whitequark> and then you need complicated tuning circuits that work at that voltage
<whitequark> 15 kV caps are not any cheaper than pa91 amps
<sb0> you can do a resonant amp at any output voltage you want
<whitequark> I know
<whitequark> I've seen these designs, and I don't particularly want to build one
<whitequark> with a reasonably high m/z that is
<sb0> so where is the 15kV coming from?
<whitequark> from the rod diameter and frequency and m/z limit
<whitequark> try plugging something like 3mm, 1MHz and m/z >= 500 or >= 1000 there
<sb0> what sort of stuff has this sort of m/z? organic molecules?
<whitequark> yes
<whitequark> my original interest in QMS was in analysis
<whitequark> actually, my vacuum work happened *because* I wanted a QMS not the other way around
<whitequark> don't think I even knew about leak detectors back then
<rjo> sb0: it's less about need and more about the voltges they run at and the efficiency of that resonator. you want to run an ion trap deep in the stability region (high freq, high voltage), a QMS at the edge (lower freq, lower voltage). and bigger resonators have higher Q thus better efficiency.
<rjo> sb0: a MHz helical resonator would be just ugly big or small and equivalently lossy as a discrete L/C.
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<GitHub175> [artiq] enjoy-digital pushed 1 new commit to master: https://github.com/m-labs/artiq/commit/0546affd4c6ce72490505743be0f375ec394e0da
<GitHub175> artiq/master 0546aff Florent Kermarrec: gateware/target/phaser: jesd start signal renamed to jsync
<_florent_> sb0: I'm testing jesd with kcu105/ad9154 still with 4 lanes but with the upper ones, I have issues with 2 lanes (AD9154 does not receive ILA correctly).
<_florent_> sb0: I don't want to spend too much time or now on that (I don't know if it's a problem with my hardware or not) so I'll wait the sayma board to really test with 8 lanes (first test with the 4 lowers / 4 uppers and then the 8)
<GitHub139> [artiq] cjbe opened pull request #725: master: record time run() is called (master...record_run_time) https://github.com/m-labs/artiq/pull/725
<bb-m-labs> build #550 of artiq-board is complete: Success [build successful] Build details are at http://buildbot.m-labs.hk/builders/artiq-board/builds/550
<bb-m-labs> build #468 of artiq-win64-test is complete: Warnings [warnings python_unittest] Build details are at http://buildbot.m-labs.hk/builders/artiq-win64-test/builds/468 blamelist: Florent Kermarrec <florent@enjoy-digital.fr>
<bb-m-labs> build #1490 of artiq is complete: Success [build successful] Build details are at http://buildbot.m-labs.hk/builders/artiq/builds/1490
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<GitHub146> [artiq] jordens commented on issue #725: I am generally a bit worried about the `localtime()` usage (same for `start_time`). I would prefer `time()` (but still use local timezone conversions for the naming of the directories and files).... https://github.com/m-labs/artiq/pull/725#issuecomment-297411258
<GitHub83> [artiq] sbourdeauducq commented on commit 0546aff: If the gateware handles the JSYNC pin completely, then there should be very little handling of it in ARTIQ (just requesting the pin and passing it to your core). https://github.com/m-labs/artiq/commit/0546affd4c6ce72490505743be0f375ec394e0da#commitcomment-21916357
<GitHub62> [artiq] sbourdeauducq pushed 1 new commit to master: https://github.com/m-labs/artiq/commit/8ebb33c05cfbbbfb5043178c2e42bb64e36edc1c
<GitHub62> artiq/master 8ebb33c Chris Ballance: master: record time run() is called
<GitHub27> [artiq] sbourdeauducq closed pull request #725: master: record time run() is called (master...record_run_time) https://github.com/m-labs/artiq/pull/725
<bb-m-labs> build #551 of artiq-board is complete: Success [build successful] Build details are at http://buildbot.m-labs.hk/builders/artiq-board/builds/551
<bb-m-labs> build #469 of artiq-win64-test is complete: Warnings [warnings python_unittest] Build details are at http://buildbot.m-labs.hk/builders/artiq-win64-test/builds/469 blamelist: Chris Ballance <chris.ballance@physics.ox.ac.uk>
<bb-m-labs> build #1491 of artiq is complete: Success [build successful] Build details are at http://buildbot.m-labs.hk/builders/artiq/builds/1491
<GitHub158> [artiq] jordens opened issue #726: use time() for timestamps https://github.com/m-labs/artiq/issues/726
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<GitHub101> [artiq] enjoy-digital commented on commit 0546aff: yes thanks, as discussed on IRC I'll do it. https://github.com/m-labs/artiq/commit/0546affd4c6ce72490505743be0f375ec394e0da#commitcomment-21920605
<rjo> _florent_: does it consistently work at 10 GHz now? or does it still need multiple attempts?
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<GitHub54> artiq/master 79c339d Florent Kermarrec: gateware/targets/phaser: jesd core now handles jsync completely
<GitHub54> [artiq] enjoy-digital pushed 1 new commit to master: https://github.com/m-labs/artiq/commit/79c339d4ac1440b24b84a2f4210e773a7ee029c5
<bb-m-labs> build #552 of artiq-board is complete: Success [build successful] Build details are at http://buildbot.m-labs.hk/builders/artiq-board/builds/552
<bb-m-labs> build #470 of artiq-win64-test is complete: Warnings [warnings python_unittest] Build details are at http://buildbot.m-labs.hk/builders/artiq-win64-test/builds/470 blamelist: Florent Kermarrec <florent@enjoy-digital.fr>
<bb-m-labs> build #1492 of artiq is complete: Success [build successful] Build details are at http://buildbot.m-labs.hk/builders/artiq/builds/1492
<_florent_> rjo: attempts are now handle by the gateware, I'll check numbers tomorrow with the new restart_count monitor
<_florent_> handle/handled
<rjo> _florent_: ack.