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<andyjoe> Hi, can anyone provide any information about how to program LPDDR2/3 memory controller ?
* Wizzup doesn't know
* Wizzup is also going to bed now :-) good luck
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<andyjoe> any one know how to program LPDDR2/3 memory controller? Please help.
<mdrjr> andyjoe: what is program?
<mdrjr> configure it?
<mdrjr> RAM is configured on the bootloader. ref to your platform bootloader sources to check how its initialized and configured
<andyjoe> want to test partial array self refresh. But I did not find any resource of how to program the DMC.
<andyjoe> Yes, I find some u-boot code. I don't understand the code. This is a link http://lists.denx.de/pipermail/u-boot/2013-December/169704.html . I dont underand the struct they defined.
<andyjoe> can you provide any suggestions? There is no information about the register layout of the DMC.
<mdrjr> andyjoe: full datasheet with all the register informations is only available with a NDA with Samsung.
<andyjoe> what you mean "NDA with Samsung" ?
<andyjoe> I see.
<andyjoe> I think only companies can be NDA of another company. Right?
<mdrjr> I don't know Samsung's policy for that.
<andyjoe> I see. Thank you
<andyjoe> do you aware any other LPDDR device that is not produced by Samsung?
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<Wizzup> 22:12 <liquidAcid> in case you want to add some kernel tree for the odroid devices
<Wizzup> 22:13 <liquidAcid> there is some vanilla-based tree for the u2 here by prahal: http://git.prahal.homelinux.net/odroid.git/
<Wizzup> 22:13 <liquidAcid> and a tree for the x2 here: https://github.com/tobiasjakobi/linux-odroid
<Wizzup> 22:14 <liquidAcid> i've also mirrored prahal's trees to my repo, since his homeserver is sometimes offline
<Wizzup> Does anyone want to pick this up and create a page?
<Wizzup> I will have access to my u2 in a week or so again, so I could do it in some time
<Wizzup> which reminds me - open up the wiki to all again without barrier
<Wizzup> except for spam
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<afaerber> Wizzup, for -XU I just pushed https://github.com/afaerber/linux/commits/odroidxu
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