<wpwrak>
would anyone know if the choice of SPI channel is critical for the LCD ? in N900, it's SPI#1 using SPI1_CS0 and SPI1_CS2. i'm thinking of moving it to SPI#3 with SPI3_CS0 and some arbitrary other GPIO for CS2.
<wpwrak>
the question is if there are any non-open programs that would resent such a change.
<wpwrak>
enyc: if that flies, then it seems that we could indeed free up another USB port :)
DocScrutinizer05 has quit [Disconnected by services]
DocScrutinizer05 has joined #neo900
<MonkeyofDoom>
wpwrak: even in nonfree programs a binary patch for that kind of thing seems trivial
dal has quit [Quit: Leaving]
dal has joined #neo900
EndZ has quit [Ping timeout: 264 seconds]
EndZ has joined #neo900
hashcore has joined #neo900
hashcore has quit [Client Quit]
hashcore has joined #neo900
jonsger has joined #neo900
opa-ben has joined #neo900
jonsger has quit [Ping timeout: 264 seconds]
tomeff has joined #neo900
mzki has joined #neo900
freemangordon_ has joined #neo900
varu- has quit [Remote host closed the connection]
varu|zZz has joined #neo900
<wpwrak>
MonkeyofDoom: okay, binary patching could also be an option :) i was hoping for "naw, nobody is *that* stupid and hard-code such an SPI dependency into a closed binary", though ;-)
<wpwrak>
pleasant surprise: at a first glance, the number of GPIOs available isn't too different from the number we're likely to need. so we shouldn't need an army of GPIO extenders.
<enyc>
wpwrak: good, pleased to hear i'm sparking a helpfil discussion without complicating matters too mutch
<enyc>
wpwrak: this is something nikolaus can then verify/double-chock when maknig a proto_v2 ?
<jonwil>
If anyone knows of a specific /dev or /sys entry or something, I can see who is using those particular SPI things
<wpwrak>
enyc: i'd think of it more as a v3 feature. v2 will be very constrained in terms of available CPU signals
<enyc>
whyso?
<wpwrak>
enyc: due to the CPU not being on the neo900 pcb but on a beagleboard
<enyc>
wpwrak: i see
<wpwrak>
enyc: the idea is to avoid having to make a complex PCB (with many layers to route out the signals from the OMAP) for v2
paulk-collins has joined #neo900
<enyc>
wpwrak: so... your timeline, shows/explaints proto_v2 as being beagleboard attached allowing ..... etc... to be tested,?, and explains v3 proto ought to be able to move onto ....hw / pinmux decisions to be made.... etc.... ?
<wpwrak>
i'm not entirely convinced by this approach, but if nik thinks it makes sense ...
<DocScrutinizer05>
it's rather like we're going to use a bazillion of GPIO extenders in proto_v2, with most of them eliminated in later more final design
<enyc>
GPIO extender = like 'latches' to provide extra i/o pins indirectly addresesd via a gate ?
<DocScrutinizer05>
and yes, now that we decided to have a relaxed formfactor for proto_v2 anyway, it's an alternative worth pondering to not use Bb_xM at all and rather already place a OMAP SoC on the proto PCB
SylvieLorxu has joined #neo900
<DocScrutinizer05>
enyc: addressed via I2C
<enyc>
DocScrutinizer05: what risk does that create, and what benefits ioes that provide in testing?
<jonwil>
So v2 is intended to be a test for a bunch of hardware we are using then v3 is meant to be the actual Neo900 device (i.e. close to what production devices will look like)
<DocScrutinizer05>
benefits are: lower pincount to attach to the external BrainBoard. 'risk' is a less genuine system config for tests
<DocScrutinizer05>
jonwil: exactly
<jonwil>
so which hardware do we plan to put on proto_v2?
<wpwrak>
enyc: yes, pinmux is basically a v3 thing. for now it's a sneak preview.
<DocScrutinizer05>
v2 is meant to test all peripherals
SylvieLorxu has quit [Client Quit]
<DocScrutinizer05>
jonwil: IOW v2 shall be a functionally equivalent platform but with minor detail differences, when it comes to e.g. GPIO number of a particular sensor
cccc has joined #neo900
<DocScrutinizer05>
also the BB_xM won't have the 1GB of RAM
<DocScrutinizer05>
most of them won't at least
<wpwrak>
DocScrutinizer05: i'm kinda dubious about the whole beaglebrain idea. seems like a lot of one-shot design effort to me.
<DocScrutinizer05>
yes, indeed
<DocScrutinizer05>
the more I think of it, the more a dirt cheap layout incl SoC, on an expensive PCB, makes sense
<jonwil>
if only I had the free time (and skills/interest) to do more work on the software stack
<wpwrak>
(not even taking into account the sourcing mess for those beagles. oh, how is that order from mouser coming along ? it must be close to its 2nd anniversary, right ? :)
<DocScrutinizer05>
right, and zombie state
SylvieLorxu has joined #neo900
<jonwil>
Its a pitty we dont have more software guys in this community (and/or that the guys we do have don't have as much time to devote to the software stack as they would like)
<DocScrutinizer05>
SUCKS!
<wpwrak>
;-)
<wpwrak>
it's nice that some things are so reliable (-:C
<enyc>
jonwil: ...or... are you any good at writing-up this description of project status for benefit of investors//crowdfunding more users to show we are credible/viable to complete and research to get more interest? I myself am supposed to be getting start of some SLT sessions thorugh college now to help with some of my descriptiveness/discorse and so on, might be in a better position to help some of thes
<enyc>
e things in many months to come.
<jonwil>
I totally suck at writing anything for even technical end-users to read
<enyc>
DocScrutinizer05: does that (separate PCB) help with adding breakout/monitoring pins for hw debugging, not available on beagleboard?
<jonwil>
let alone investors or whoever
<DocScrutinizer05>
enyc: sorry, I think there's an incorrect assumption in your question
<enyc>
DocScrutinizer05: ok i'v eprobably mised something having not read the v2_proto planning document etc
<DocScrutinizer05>
the original proto_v2 design is a Neo900 sandwich attached to a BB_xM with a number of flex cables
<DocScrutinizer05>
No SoC or memory or RAM on the sandwich
<DocScrutinizer05>
no GAIA aka TWL4030 either
<enyc>
and plannig to finalize proto_v2 design with nikolaus next month?
<DocScrutinizer05>
now we redefined the proto_v2 to at least have an extended size UPPER board in sandwich, of arbitrary size. So adding a SoC and stuff in there is not as much of a layout problem as it will be for the final size restricted design
<DocScrutinizer05>
well, that would be nice, but depends on Nikolaus' available timeslots
<DocScrutinizer05>
but yes, that's the plan at least
<DocScrutinizer05>
either with or without nikolaus. I'm probably skilled enough to do the relaxed layout myself, though it takes 10 times longer than Nikolaus would need
<DocScrutinizer05>
I'm EE but not exactly an experienced layouter
<DocScrutinizer05>
IOW I know how to do it but I have no training
<DocScrutinizer05>
er I'm not trained on that particular task
<DocScrutinizer05>
also no experience so I will probably do a number of mistakes which a trained experienced layouter like Nikolaus never would do
<DocScrutinizer05>
which would possibly result in an additional board spin needed
SylvieLorxu has joined #neo900
<DocScrutinizer05>
which causes additional delays and cost, so maybe it's faster and cheaper to wait until Nikolaus has time to do it, even when he's busy and 'more expensive' than my work is
<DocScrutinizer05>
those are the funny little decisions you need to make all the time, which nobody really sees
<DocScrutinizer05>
fluctuations in resources, which makes any "maste rplan" a tad unprecise and confusing, even when the tasks themselves and maybe even their dependencies are well defined
<DocScrutinizer05>
I need to discuss this with Nikolaus now
<DocScrutinizer05>
on a cheering sidenote: we might have an investor who's interested in doing substantial support with capital
<wpwrak>
(discuss with nik) yup, and we'll also need an update on his other estimates down the line. e.g., if layout has become more demanding, SMT may have, too.
<DocScrutinizer05>
no details yet... But I felt like letting you all lnow
<DocScrutinizer05>
know, even
<DocScrutinizer05>
wpwrak: yep, also his estimations seem a tad off at least for a relaxed layout
<wpwrak>
let's hope so :)
<enyc>
DocScrutinizer05: i know what you mean from doing wiring on boards or mains wiring ...etc...
<wpwrak>
the original ones seemed very optimistic to me. the x4 "correction" made them rather pessimistic. hopefully there's some middle ground :)
<enyc>
DocScrutinizer05: you develop so many intuitive skills on lengths and positioning and how to bend things and all the rest of it
<DocScrutinizer05>
well, I'm pretty sure those 150+ hours are meant for finalizing the layout to production level, not for proto_v2
<DocScrutinizer05>
the *original* estimations were clearly with no R&D at all
<Wizzup>
(re: investor) cool!
<wpwrak>
put all the chips and a raw pcb in a magical bag, shake, voila ! :)
<Wizzup>
Let's hope it turns out to be something
<DocScrutinizer05>
wpwrak: kinda, yes :-)
<enyc>
Wizzup: err not sur ewherat you replying to
<DocScrutinizer05>
Wizzup: yes, indeed
jonwil has quit [Quit: ChatZilla 0.9.92 [SeaMonkey 2.39/20151103191810]]
<enyc>
i'm good at that sort of inspritation thing
paulk-collins has quit [Ping timeout: 265 seconds]
<DocScrutinizer05>
yep :-)
<DocScrutinizer05>
much appreciated
paulk-collins has joined #neo900
rootman has quit [Ping timeout: 240 seconds]
<enyc>
ok, i say this, tbh i'm in bit of irl-complexity wrt college, and i don't fully undersatd it myself
<enyc>
being referred to various sorts of help and complicated
<enyc>
so.... i genuinely can't get heavily involved tbh
<enyc>
but, definitely give feedabck nad can definitely (try) to ask questions in my many contacts/circles / comptuerlab here has many resources
<enyc>
especially if i've got things to *show* e.g. plans, documents, etc
<DocScrutinizer05>
enyc: you already got involved and many thanks for that
<enyc>
i know many who work in verilog // hardware projects etc.
rootman has joined #neo900
<enyc>
what _is_ being worked on before nikolas comes in ?
rootman has quit [Ping timeout: 276 seconds]
rootman has joined #neo900
dal has quit [Ping timeout: 256 seconds]
dal has joined #neo900
rootman has quit [Ping timeout: 240 seconds]
<DocScrutinizer05>
hm?
<DocScrutinizer05>
we just redefined the hackerbus spec, Werner will update the HB whitepaper after a quarantine period to collect feedback, we finally have a first approach into our own pinmux toolchain now...
<DocScrutinizer05>
just this minute I've sent a mail to Nikolaus to negotiate prot_v2 layout
<DocScrutinizer05>
the job, not the layout
<Wizzup>
:)
<DocScrutinizer05>
pus I need to do some more conversation with a potential investor
<DocScrutinizer05>
but first: get some lunch, my health gave my a severe warning shot yesterday
<enyc>
=)
<enyc>
DocScrutinizer05: yes, look after yourself, i've learnt this a lot too
paulk-collins has quit [Ping timeout: 276 seconds]
<cccc>
what is the status of the project?
hashcore has quit [Ping timeout: 250 seconds]
paulk-collins_ has quit [Remote host closed the connection]
<DocScrutinizer05>
cccc: the project got out of PP indiuced freeze yesterday
<Defiant>
nice, so you have all money now? What did you do to get it
<DocScrutinizer05>
well, we waited the 160 day period and then pushed PayPal to act according to their own fineprint/TOS and release the payments older than 180 days
<DocScrutinizer05>
s/160/180/
<DocScrutinizer05>
actually "we waited" isn't to the point, we had a lot of hassle going on during that period, but to no success