<shakesoda>
i want precedence for basic operations (+-*/) but everything else I don't trust inherently and add tons of parens to anyways
<shakesoda>
because of how confusing it all gets
<shakesoda>
also, this encourages writing lines of code that aren't overly complex
<pixelherodev>
I wasn't asking if it *does*, but whether it *should*
<pixelherodev>
that's a compelling argument that it shouldn't
<pixelherodev>
I like that proposal a lot
<daurnimator>
andrewrk: with the new PR, does that mean that @TypeOf(foo[x..y]) is of different types depending on if x and y are comptime-known or now?
<daurnimator>
s/now/not/
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<andrewrk>
daurnimator, yes
<andrewrk>
there are other expressions in master branch where this is true
<daurnimator>
seems.... weird to me. does that mean that in format/json/etc we should start treating pointers to arrays essentially the same as slices?
<andrewrk>
yes - but that transition has been already happening
<andrewrk>
for example `&array` coerces to a slice
<andrewrk>
the difference between single-item-pointer-to-array and slice is merely whether the length is part of the type, or runtime known
<andrewrk>
in the same way that it is generally preferable to have a comptime_int rather than fixed size integer when the value is known at compile-time, it is generally preferable to have a single-item-pointer-to-array rather than slice when the length is known at compile-time
<daurnimator>
what about a sub-array?
<daurnimator>
e.g. if I had `foo = [4]u8` `foo[1..3]` should return a `[2]u8`
<andrewrk>
yep
<andrewrk>
slices and single-item-pointer-to-array are fundamentally the same thing, with the difference only in whether the length is comptime or runtime known. the language should reflect that - it might take some adjustments, but this is in that direction
<daurnimator>
k
<diginet>
has anyone actually done work with zig on s390x?
<daurnimator>
diginet: I recall someone came in for about half a day and did some playing around..... but not really I think?
<daurnimator>
diginet: we'd love for someone to take it on
<diginet>
ok, I was just kinda curious
<diginet>
I know a little about z
<diginet>
I am vaguely entertaining a port of LLVM to vax
<diginet>
just for the hell of it
<diginet>
that or m68k
<diginet>
so it would be fun to see if zig could then be ported to one of those
<daurnimator>
diginet: are you interested in just targetting it? or actually running the compiler on it?
<diginet>
just targetting, not necessarily self-hosting
<daurnimator>
then you don't need to port LLVM...
<daurnimator>
diginet: how do system calls work there? is there a libc?
<diginet>
for VAX?
<diginet>
there is a port of glibc but not musl I believe
<diginet>
VAX is weird in that it kind of has hardware-enforced calling convention
<diginet>
oh, syscalls
<daurnimator>
diginet: you started off with s390x
<diginet>
oh
<diginet>
right
<diginet>
I;m not sure on s390x
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<pixelherodev>
Back to work on LLVM codegen :D
<pixelherodev>
Parser is now sufficient for the simple tests I'm giving it (and Lexer is basically completely good when it comes to Zig output)
<pixelherodev>
Register allocator design is simple and straightforward for the first target, so I hope to have the test running in the morning :D
<diginet>
pixelherodev: codegen for what?
<pixelherodev>
Custom 32-bit target called LIMN
<diginet>
nice
<pixelherodev>
I also plan on adding Z80 short-term, and x86 in the longer run
<diginet>
x86 ..? it doesn't already have that?
<diginet>
I've been considering porting LLVM to my own arch
<pixelherodev>
This is a completely custom backend
<diginet>
ah
<pixelherodev>
It's self-hosted in Zig
<pixelherodev>
It lexes and parses LLVM IR directly, builds AST, then passes that along to backend (with some room for optimization passes in the middle)
<pixelherodev>
It's also lightning fast (runs in single-digit milliseconds in release mode), which is crucial because I plan on running it within the emulator it's targeting
<pixelherodev>
And that'll of course have a massive performance overhead
<pixelherodev>
Heck, if I can make a performant x64 backend, it'd probably be useful for reducing compile times in debug mode for Zig
<pixelherodev>
But i haven't worked with x86 asm in so long I'm honestly not sure I'd be able to do that
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<daurnimator>
diginet: so what are you going to try? :) I'm intrigued
<diginet>
daurnimator: depends on how much time I have
<daurnimator>
diginet: it would be really cool to just target VAX or s390x from the regular zig compiler.
<diginet>
I have my own compiler to work on
<diginet>
daurnimator: yeah I think so
<daurnimator>
diginet: for high tier support we'd need some record of the system functionality available (syscalls/libc)
<diginet>
it would be neat to see zig code running on 4.3BSD/VAX
<daurnimator>
diginet: what is your compiler? and if you're working on your own language; what brings you to zig?
<diginet>
daurnimator: yes, own language. I've been following zig for awhile and I just like staying in the loop with emerging languages
<diginet>
daurnimator: I am deeply sympathetic to zig's eschewing of any and all macros. the comptime system is conceptually a dual to the staging scheme I have in mind for my language
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<Kingsquee>
hol' up
<Kingsquee>
is it possible to have comptime values as struct fields?
<daurnimator>
Kingsquee: sure
<Kingsquee>
error: expected type 'type', found 'comptime_int'
<Kingsquee>
integer_bits: I
<mq32>
what is "I"?
<mq32>
sounds like I is an comptime_int and not a type
<Kingsquee>
I's a comptime_int
<mq32>
you have written "integer_bits: 4" ;)
<mq32>
zig expects a type, if you want to a have a type with 4 bit width, look at @Int
<mq32>
or how was it called?
<daurnimator>
Kingsquee: that's a comptime-type. not a comptime-value
<Kingsquee>
mq32: I essentially want rust's phantomdata on a type parameter
<mq32>
what is phantomdata?
<mq32>
can you elaborate that?
<Kingsquee>
oh god what's a phantomdata
<Kingsquee>
so if I have struct Foo<T>
<Kingsquee>
but T is a type that's used only for storing information at compiletime, rather than defining the type of a field
<mq32>
ah, just export it from your type instead of a field
<Kingsquee>
you still have to store the type as a field somehow, or the compiler will complain about an unused type parameter
<Kingsquee>
so we use a field of type PhantomData<T>
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<mq32>
fn(comptime some : Something) type { return struct { pub const phantm = some; }; }
<Kingsquee>
ooh const
<daurnimator>
mq32: I was just writing the same thing :)
<mq32>
just a public "static" war
<mq32>
*var
<mq32>
we don't need war, we need var! :D
<daurnimator>
Kingsquee: comptime struct fields are something else entirely :)
<Kingsquee>
VAR
<Kingsquee>
WHAT'S IT GOOD FOR
<Kingsquee>
alright this makes sense
<Kingsquee>
thanks!
* mq32
sobs about bad software and compiler infrastructure
<mq32>
kids, never use C++Builder!
<mq32>
it is pain
<Kingsquee>
so, is there a difference between struct { foo: u8 } and struct { var foo: u8 } ?
<mq32>
yes
<daurnimator>
Kingsquee: 1. is a field. 2. is a namespaced global
<mq32>
the one thing is a field (the first one)
<mq32>
damn you, daurnimator! :D
<Kingsquee>
dat wpm tho
* Kingsquee
swoons
<daurnimator>
traditional cherry blues baby
<mq32>
i should search my usb-ps/2 adapter
<mq32>
model m masterrace *grin*
<diginet>
model F is even better
<diginet>
nkro
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<Kingsquee>
so if I have fn Foo(comptime T1: comptime_int, comptime T2: comptime_int) and I want to return an integer with the number of bits T1 + T2
<Kingsquee>
how would I do this
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<Kingsquee>
i.e. const foo: u3 = Foo(1, 2);
<mq32>
you want an integer with the width on T1+T2 bits?
<mq32>
or with a value of T1+T2?
<Kingsquee>
width
<mq32>
const I = @Type(std.builtin.TypeInfo{ .Int = .{
<mq32>
.is_signed = false,
<mq32>
.bits = 40
<mq32>
} });
<mq32>
just replace "40" with T1+T2
<mq32>
or some other arbitrary math that yields a comptime_int
<mq32>
(note that *any* integer type coerces to comptime_int)
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<forgot-password>
Is there an explanation for builtin.AtomicOrder? I'm trying to grasp atomic operations in general, but I can't find any proper resources :/
<forgot-password>
Wow, thank you for the enlightenment, I can only suggest everybody else to check it out :)
<forgot-password>
Does an @atomicStore alone prevent torn reads?
<forgot-password>
I feel like my questions seems kind of underspecified?
<mq32>
i think it depends on the mode you pass in
<mq32>
using seq_cst will create a barrier for reordering
<mq32>
so all reads/writes before your store will be executed before the store
<mq32>
no reordering will happen
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<forgot-password>
So if I dereference a pointer on one thread, and change the pointer on another one, does it guarantee to fully load the pointee first?
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<mq32>
pointers should be inherently atomic as they can fit in a register
<andrewrk>
the way that atomics relate to threads has only to do with data races. so the answer is yes, you will see one value or the other, but not a torn read
<andrewrk>
the other important property of atomics is how they communicate to the compiler, and how atomic operations act on the same thread with respect to each other and other memory operations
<TheLemonMan>
uh I think that since the atomic write locks the cache line it's writing to the deref will either read the old value or the new one
<mq32>
i wonder…
<mq32>
pointers are not atomic on AVR hardware
<mq32>
so reading/writing a pointer is not an atomic operation and they should be load with an atomic operation (p = @atomicLoad(&ptr) instead of p = ptr)
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<mq32>
huh. i just tried to compile a pointer load for AVR
<mq32>
ah, AVR support in LLVM was experimental until now
<mq32>
andrewrk: How's the 0.6.0 release going on?
<mq32>
one month left if i read the milestone right?
<fengb>
We need to increase the bus factor
<mq32>
exp(bus)
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<andrewrk>
mq32, yes that's right. it's about time to start working on release notes
<andrewrk>
I'm sneaking in one more major language change first tho
<andrewrk>
#4752
<mq32>
oh, spoilers?
<mq32>
oh nice! this is useful :)
<andrewrk>
I expect llvm 10 to be released this week
<fengb>
Sweet, that’d fix some of my weirdo workarounds
<mq32>
nice! i feel sad that i don't have much time right now to continue my projects, but looking forward to it :)
<fengb>
Hmm... would it be a problem if we further blend array pointers and slices?
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<mq32>
want to finish my pet language project :)
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<FireFox317>
TheLemonMan, the video xd, i had to laugh :^)
<mq32>
FireFox317: one of the best talks about atomics for sure
<FireFox317>
definitely
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<discip>
Comptime is very useful but it's bloating compilation times significantly. Are there plans to improve its performance or should I just treat comptime like C++ templates?
<discip>
(aka, use them sparingly)
<FireFox317>
Does someone in here know why a global variable that is set to undefined ends up in the bss section? Like the bss section is for static data that is zero right? Shouldn't it end up somewhere else?
<forgot-password>
discip: I noticed that as well. When I wanted to pre-populate a table with data it took multiple seconds at comptime and only a few milliseconds at runtime.
<TheLemonMan>
FireFox317, is it 0xAA-filled when you read it back?
<BaroqueLarouche>
don't judge comptime performance yet, it should be better in the self-hosted compiler
<TheLemonMan>
yeah comptime is slow, check out #4055 for more info/news
<discip>
forgot-password: My number are 15-20% increase in compilation time per comptime function. One of those functions I wrote myself and the other is allocPrint
<FireFox317>
TheLemonMan, i'm doing bare metal stuff
<mq32>
FireFox317: i think it's actually reasonable to put "undefined" variables into .bss
<mq32>
because it imposes the lowest overhead
<Bekwnn>
shouldn't caching make comptime not really a pain on rebuilds though?
<TheLemonMan>
FireFox317, hm? you can still check the value and flash a led/print a message/blow up if the value is not correct
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<FireFox317>
TheLemonMan, yeah sure i'm doing qemu stuff now anyway so all the memory is already 0, but i remember for clashos (rpi) we had a big static buffer and on startup that took a long time to zero all that data
<TheLemonMan>
oh, are you compiling in debug mode?
<TheLemonMan>
you probably had a slow memset implementation heh
<FireFox317>
But in that case i could probably use linksection to put it in a different section which i wouldn't zero out on startup
<FireFox317>
TheLemonMan, yes maybe. But I was expecting global static undefined data in release mode to be really undefined, but it still ends up in the bss section
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<andrewrk>
discip, I expect comptime perf to roughly match cpython's perf in the future. right now it is an order of magnitude worse
<FireFox317>
I guess there is no such a section that isn't initialized, we only have .text, .data, .rodata, .bss
<TheLemonMan>
yeah that's somehow expected in release mode, why should LLVM place garbage in those values? that'd be just a waste of space
<TheLemonMan>
were you seeding some RNG with that data? :^)
<andrewrk>
for non-freestanding applications, bss makes the most sense since it's "free". but for freestanding applications, it could make sense to have a truly undefined linker section, that the initialization code would not have to memset
<FireFox317>
andrewrk, that is exactly what i mean, had some trouble explaining it
<andrewrk>
actually we already kinda want something like this even for non-freestanding- I believe I opened a proposal to put undefined stuff in its own linker section and then memset it to 0xaa before main()
<FireFox317>
for now i guess i can just put the data in another section which i don't initialize at startup
<andrewrk>
that should work
<TheLemonMan>
I really doubt QEMU will pass you non-zeroed pages
<andrewrk>
I believe the goal is to memset() fewer bytes on startup
<FireFox317>
they pass zeroed data indeed, my code was working when i forgot to zero the bss section
<FireFox317>
but thanks for the insights guys, i'm understanding it better now :)
<frmdstryr>
FireFox317 you could just modify the startup asm / code to just not set the bss at all
<FireFox317>
frmdstryr, that's a problem because if you define a global static variable and set it to zero it will also end up in the bss section
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<pixelherodev>
`linksection()`?
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<FireFox317>
a wait, i think there is .sbss which is for zero initialized global stuff and normal .bss for uninitialized `var x: u32 = undefined`
<FireFox317>
nvm s stands for small in this case lol
<TheLemonMan>
IIRC it's not even used by ARM
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<frmdstryr>
Makes sense, why waste the flash space .... Sounds like you really need a separate section then.
<FireFox317>
TheLemonMan, arm not, RISC-V apparently does
<andrewrk>
FireFox317, you can linksection() all the undefined ones with ".myspecialbss", and then in the script, put .myspecialbss into the end of bss after the other bss, but capture the pointer address at that point. then when you memset, use that address as the end
<andrewrk>
does that make sense?
<FireFox317>
ha andrewrk thanks, yeah i knew how to do that :)
<FireFox317>
maybe i should explain a bit more why i want this. I'm trying to write a bare metal app completely in zig. So obviously i need some inline assembly, but i also need some space for a stack and i defined that as a global undefined variable and did not expect the compiler to put it in the bss. There is no need to zero out the stack :) Thanks for the help guys!
<FireFox317>
But the workarounds are clear now
<andrewrk>
I think this can be improved eventually
<frmdstryr>
Good luck. I spent part of the last 3 months porting parts of the stm32h7 hal to pure zig. It's a nontrivial time consuming task. Pretty sure the biggest reason why people __wont__ use zig for embedded is no vendor support
<FireFox317>
well for now it's still a quite pleasant task actually :)
<andrewrk>
if the hal is in c you can still use zig to cross compile it
<FireFox317>
andrewrk: using `-target riscv64-freestanding-none -mcpu=baseline_rv64-c` still outputs compressed instructions, the c in cpu-features stands for compressed instructions, but i'm removing that. --verbose-llvm-cpu-features outputs `name=kernel triple=riscv64-unknown-unknown-unknown
<FireFox317>
i'm using llvm10 branch btw, but that shouldn't matter?
<andrewrk>
that debug output means that we have successfully requested "-c" from LLVM, so this may be an upstream bug
<andrewrk>
the next step will be creating a small reproducible test case for an llvm bug report
<FireFox317>
yes but the triple is riscv64-unknown-unknown-unknown is that correct?
<andrewrk>
yeah that's riscv64-freestanding according to llvm
<pmwhite>
I may have asked this here before, but is there a way to not display the command that failed on a compilation failure? I'm on nixos, and I'm linking several libraries, so the command that gets built up is pretty large and scrolls the errors off the screen when I get a compiler error.
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<FireFox317>
okay, will try to make a small test case
<andrewrk>
pmwhite, there is not, but maybe there should be
<andrewrk>
FireFox317, if you can reproduce the problem with clang that would be 90% of the work of an llvm bug report
<andrewrk>
if you cannot reproduce with clang, maybe zig is doing something horribly wrong
<fengb>
"No discussion of things that are both controversial and off-topic." lucky for me I'm usually either-or 🙃
<FireFox317>
andrewrk: happens with release-safe and release-fast only, release-small works fine. what is the clang equivalent of release-safe/fast?
<andrewrk>
-O3
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<FireFox317>
andrewrk: i was missing a volatile, that was the problem xd
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<andrewrk>
hmm how did that end up causing compressed instructions?
<ifreund>
anyone haven a simple example build.zig I could copy from? docs seem to be sparse currently
<FireFox317>
it didnt. I thought it was a compressed instruction, but it wasn't.
<danyspin97>
it parses the line "foo=bar" and returns "=bar", then I call .key to get "foo"
<danyspin97>
then I use another class that takes "=bar" and returns "bar" and another that check for quotes, but I guess it's time to rewrite this mess :D
<mq32>
yep, sounds pretty overengineered
<danyspin97>
mq32: just checked your code (with tests) and works file, thanks for your huge help!
<mq32>
you're welcome
<danyspin97>
and tests now look better :D
<danyspin97>
since you've done the code and it is now on github, do yo
<danyspin97>
u want your name on the copyright?
<mq32>
i don't care
<mq32>
it's nice to know that i helped you but that function isn't worth a copyright notice :D
<mq32>
i'm off to bed
<danyspin97>
g'n :)
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