clifford changed the topic of #yosys to: Yosys Open SYnthesis Suite: http://www.clifford.at/yosys/ -- Channel Logs: https://irclog.whitequark.org/yosys
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<shapr> yow!
<shapr> Anything exciting going on?
<shapr> ZipCPU: think you'll get one of those RISC-V linux systems?
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<maikmerten> hi again :-)
<maikmerten> AFAIK the paths for include directives in Verilog are workdir-relative, not file-relative. In iverilog I can influence this behaviour using a cmdline argument. Does yosy also include the files' directory into the search path?
<maikmerten> (I'd really like file-relative include paths, just wondering if this will summon problems later on)
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<sorear> o/
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<shapr> sorear: did you get a risc-v linux board?
<sorear> no
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