alyssa changed the topic of #panfrost to: Panfrost - FLOSS Mali Midgard & Bifrost - Logs https://freenode.irclog.whitequark.org/panfrost - <daniels> avoiding X is a huge feature
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<cphealy> danboid: Cool, thanks! As we discussed, you had to change the devfreq governor for the GPU from ondemand to performance as with ondemand it would stay locked at the minimum frequency.
<macc24> cphealy: for me it worked
<cphealy> macc24: Do you mean on the S905X3?
<macc24> ChanServ: on rk3326, rk3288, rk3399 and on mt8183(somewhat) it worked for me
<cphealy> ack This was with S905X3 with 5.11 kernel so possibly some diff there.
<cphealy> Good to hear devfreq is working correctly on these other platforms though.
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<macc24> "X server with glamor hacks for gles2 and rga based exa"
<macc24> i wonder if it would work on mainline rockchip devices with panfrost
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<daniels> EXA :(
<daniels> there's no RGA support in mainline anyway
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<macc24> daniels: there is drivers/media/platform/rockchip/rga
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<robmur01> macc24: IIRC that's implemented as a v4l2 media driver, and as such not useful for display
<alyssa> yeah
<alyssa> also iirc RGA on RK3399 had some serious hw issue that made it useless for display, so the v4l2 driver was just a way to salvage some silicon
<jernej> what's wrong with v4l2 driver? buffer can be exported as dmabuf fd and imported in DRM
<jernej> or vice versa
<mmind00> https://lwn.net/Articles/729290/ has the gist of why the rockchip rga is not really great ;-)
<macc24> ok
<macc24> "unlike exynos g2d"
<macc24> so exynos g2d is usable for xorg?
<narmstrong> I wrote the ge2d for amlogic based of rga and g2d, no way these can pass v4l2 compliance... anyway I totally managed to use it to rotate a buffer in conjunction with DRM with dma-buf because amlogic doesn’t have an IOMMU for display, this is the main issue with RGA
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* alyssa is testing code before landing it
<alyssa> This is new :'o
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<macc24> does devfreq frequency scaling work on malis on exynoses?
<alyssa> ..exynos?
<macc24> exynos
<alyssa> .......exynos?
<macc24> yes
<alyssa> por que
<macc24> can i just plug some frequencies into /sys/class/devfreq/whatever/max_freq and min_freq and expect it to work perfectly fine excluding mali t628 weirdness?
<alyssa> shruggie
<alyssa> thanks for volunteering to debug devfreq on snow
<alyssa> ;)
<macc24> i promise that i didn't get an exynos device
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<robmur01> macc24: there are OPP tables defined in the SoC DTs, so I see no reason why it shouldn't work
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<icecream95> Something seems wrong here... pan_blitter_get_blend_shaders(dev=0xaaaaab497c68, rt_count=23857, rts=0x2c313d73656c706d, blit_shader=0xaaaaabaf2070, blend_shaders=0xffffffffd848)
<alyssa> Bifrost only supports 8 render targets.
<alyssa> For 23857, you'll need Valhall.
<HdkR> That's a large number of rendertargets. Also a huge VA space for rts
<robmur01> indeed, "mples=1," is a very weird address to be storing things at :P
<icecream95> Time to recompile with ASan...
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<alyssa> I like asan
<HdkR> I love asan
<alyssa> robclark: Probably "nr_samples=1" in the label for the blend shader.
<HdkR> Sadly ASAN doesn't really work when you don't have any virtual memory left :<
<alyssa> What does ASAN have to do with virtual memory? :-p
<HdkR> Well it tries to allocate some memory and then dies
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<icecream95> ==350==ERROR: AddressSanitizer: stack-buffer-overflow on address 0xffffc3a53bd7 at pc 0xffff8384e148 bp 0xffffc3a529f0 sp 0xffffc3a52a58
<icecream95> #0 0xffff8384e144 in __interceptor_vsnprintf (/lib/libasan.so+0x5b144)
<icecream95> #2 0xffff7b0a0c38 in pan_blitter_get_blit_shader (/tmp/pantest/lib/dri/mediatek_dri.so+0x22c6c38)
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<icecream95> int snprintf(char *restrict str, size_t size, const char *restrict format, ...);
<icecream95> Note that size is unsigned...
<alyssa> `len -= ret` buffer overflows? :facepalm:
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<icecream95> Also... C99 gives the return value (as always) as the number of characters that would have been written in case the output string has been large enough
<urjaman> yeah and IIRC it is characters not counting the terminating nul (both size and the return value)
* urjaman skimmed through some snprintf code today...
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<icecream95> alyssa: Note my "overhead" branch has a bunch of commits which speed up BO cache lookup, but maybe they don't matter so much after "Fix major flaw in BO cache"
<alyssa> nod
<alyssa> I'm mad about that one
<anarsoul|2> what's "major flaw"?
<anarsoul|2> or rather what major flaw?
<alyssa> anarsoul|2: !10794 dumb typo adding huge amounts of overhead
<alyssa> lima handles this correctly
<anarsoul|2> I see, thanks
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<alyssa> Aside -- did GALLIUM_HUD break recently?
<anarsoul|2> nice catch :)
<alyssa> anarsoul|2: I should've caught it a year ago.
<robmur01> aww man, I spend a couple of days not looking at gitlab and you go sneaking in commits in about the one area I can usefully review :P
<alyssa> robmur01: hmm?
<alyssa> which commits would those be?
<robmur01> the "G52 R1p0 looks different from G52 r0px" shenanigans
<alyssa> robmur01: If you have post-merge comments uh lmk? :P
<alyssa> oh
<alyssa> I see.
<alyssa> robmur01: So, does the IP revision matter for anything in software (user or kernel)..?
<robmur01> nothing specific that I'm aware of - I don't know what significance the minor arch version bump has
<alyssa> alright
* alyssa bisects GALLIUM_HUD
<alyssa> Bisecting: 2427 revisions left to test after this (roughly 11 steps)
<alyssa> ....sigh.
<alyssa> Me, at the beginning of the week: "let's get oustanding MRs to zero"
<alyssa> Me when 3 MRs are opened today
<alyssa> f
<robmur01> let's hope they're merely average MRs, then it's cool right? :P
<HdkR> I personally enjoy when I'm working on a feature, but it requires fixing seventeen other things. Then those can't be PR'd until all the work is done so you get a wackload of PRs dropped in one day :)
<HdkR> and then my CI cries when I open 13 PRs in an hour
<alyssa> enjoy?!
<alyssa> icecream95: Anything !10197 is pending on besides Midgard testing?
<alyssa> I can test and land if you're happy with it.
<HdkR> It's a therapeutic wind down doing the break-up of changes at the end
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<alyssa> bbrezillon: I notice v3d doesn't have *any* implicit dep tracking for BO access
<alyssa> and instead manually inserts all the flush reader, flush writer calls
<alyssa> I don't know if that's better or not.
<alyssa> Although surely, explicit BO access flags for anything marked PRIVATE is just noise.
<alyssa> I guess adding unneeded BOs to the { vertex, fragment } job adds a bit of overhead in kernel space, but I suspect it'd be neglible..
<alyssa> and as it is most of the users require both
<alyssa> Bisect blames packed uniforms. Again.
<alyssa> Reverting fixes the HUD. Let's dig into this one. Sigh.
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<alyssa> also, debating s/ / /g'ing panfrost to match mesa
<icecream95> alyssa: I have a WIP updated branch for that MR, fixing sysvals: https://gitlab.freedesktop.org/icecream95/mesa/-/commits/push-range-2
<alyssa> ack
<alyssa> let me know when you're ready for review
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<alyssa> Today has been a lot of recursive debug
<alyssa> Wanted to test perf of my series on top of bbrezillon's, but then I found bbrezillon's had a perf regression, but then I found the fix to that is actually a longstanding regression, but while trying to benchmark that I noticed GALLIUM_HUD=fps wasn't working, so then I found there's a backend bug breaking nir_to_tgsi that I had to go fix... sigh
<alyssa> Did I ever get back to my series in the first place? Of course not
<cphealy> Regarding GALLIUM_HUD breakage, is this something CI could catch?
<alyssa> In theory? I'm not entirely sure how that would work.
<alyssa> With all the fixes, piglit drawoverhead is much less angry at me