sb0 changed the topic of #m-labs to: ARTIQ, Migen, MiSoC, Mixxeo & other M-Labs projects :: fka #milkymist :: Logs http://irclog.whitequark.org/m-labs
fengling has joined #m-labs
fengling has quit [Ping timeout: 240 seconds]
fengling_ has joined #m-labs
<sb0_> whitequark, did you figure out the backplane?
evilspirit has joined #m-labs
<GitHub120> [artiq] sbourdeauducq pushed 1 new commit to master: https://git.io/v2S3i
<GitHub120> artiq/master 0c97043 Sebastien Bourdeauducq: gateware/nist_clock: pin assignment corrections from David Leibrandt
bentley` has quit [Ping timeout: 248 seconds]
bentley` has joined #m-labs
<GitHub79> [artiq] sbourdeauducq pushed 1 new commit to master: https://git.io/v2Sc6
<GitHub79> artiq/master b83b113 Sebastien Bourdeauducq: gui/moninj: make widgets look less like buttons
evil_spirit has joined #m-labs
evilspirit has quit [Ping timeout: 260 seconds]
sb0_ has quit [Quit: Leaving]
_whitelogger_ has joined #m-labs
_whitelogger has quit [Ping timeout: 260 seconds]
siruf_ has joined #m-labs
siruf_ has quit [Changing host]
siruf_ is now known as siruf
mwalle has joined #m-labs
<cyrozap> I'm trying to build MiSoC, but the build is failing in some weird ways. When it tries to build the BIOS, I get this: https://paste.fedoraproject.org/332604/56980118/
<cyrozap> Binutils: 2.26.20160125, GCC: 5.3.0
sb0 has joined #m-labs
<sb0> cyrozap, probably your design lacks a UART
<cyrozap> That's correct, it it necessary?
<cyrozap> *is it
<sb0> yes
<cyrozap> Aw, that's a bummer. The only ports I have available on this device are Ethernet, USB host, digital audio, micro-HDMI (really just DVI), and DVI-I.
<sb0> how do you plan to debug it then?
<cyrozap> JTAG?
<cyrozap> Maybe I'll just boundary-scan really fast and use a very slow baud rate...
<sb0> there are more efficient schemes for serial-over-JTAG. but you'll have to 1) write non-portable gateware to interface to the JTAG chain in your device 2) write non-portable software that creates pyts, virtual COM ports, etc. on your PC
<sb0> might be better to take two GPIO pins and hook those up to an off-the-shelf serial/USB cable
<cyrozap> Actually, a serial-over-JTAG module sounds like it would be a fun little project, so I think I'll try that first. This is an existing product with no GPIO available (unless I borrow some from the SPI chip or something), so I'd like to avoid soldering to it if I can help it.
<GitHub78> [artiq] sbourdeauducq pushed 1 new commit to master: https://git.io/v2SgV
<GitHub78> artiq/master 9af1223 Sebastien Bourdeauducq: soc: add timer to kernel CPU system
_whitelogger_ has quit [Excess Flood]
_whitelogger has joined #m-labs
fengling_ has quit [Ping timeout: 240 seconds]
fengling_ has joined #m-labs
<cyrozap> Wow, after looking through the MiSoC code, it doesn't look like it would be too difficult to make a completely-virtual UART peripheral, thanks to all the abstraction.
<GitHub24> [misoc] sbourdeauducq pushed 1 new commit to master: https://git.io/v2SPV
<GitHub24> misoc/master b0a4176 Sebastien Bourdeauducq: cores/gpio: remove GPIOInOut, add GPIOTristate
_whitelogger has quit [Excess Flood]
_whitelogger has joined #m-labs
_whitelogger has quit [Excess Flood]
_whitelogger has joined #m-labs
<GitHub192> [artiq] sbourdeauducq pushed 3 new commits to master: https://git.io/v2SMf
<GitHub192> artiq/master b662a6f Sebastien Bourdeauducq: gateware/nist_{clock,qc2}: do not conflict with KC705 I2C
<GitHub192> artiq/master a901971 Sebastien Bourdeauducq: gateware/soc: factor code to connect CSR device to kernel CPU
<GitHub192> artiq/master cfe72c7 Sebastien Bourdeauducq: gateware/kc705: add I2C GPIO core for QC2
_whitelogger has quit [Excess Flood]
_whitelogger has joined #m-labs
_whitelogger has quit [Excess Flood]
_whitelogger has joined #m-labs
<GitHub191> [artiq] whitequark pushed 1 new commit to master: https://git.io/v2S78
<GitHub191> artiq/master 73bfbe5 whitequark: compiler: reject lambdas used as kernel functions (fixes #313).
key2 has joined #m-labs
<GitHub28> [artiq] sbourdeauducq pushed 1 new commit to master: https://git.io/v29Js
<GitHub28> artiq/master 423ca03 Sebastien Bourdeauducq: runtime: bit-banged i2c support (untested)
<sb0> bb-m-labs, force build artiq-kc705-nist_qc2
<bb-m-labs> build forced [ETA 17m25s]
<bb-m-labs> I'll give a shout when the build finishes
<sb0> bb-m-labs, force build artiq-kc705-nist_qc1
<bb-m-labs> The build has been queued, I'll give a shout when it starts
<sb0> bb-m-labs, force build artiq-pipistrello-nist_qc1
<bb-m-labs> The build has been queued, I'll give a shout when it starts
<bb-m-labs> build #152 of artiq-kc705-nist_qc2 is complete: Failure [failed conda_build] Build details are at http://buildbot.m-labs.hk/builders/artiq-kc705-nist_qc2/builds/152
<bb-m-labs> build forced [ETA 12m50s]
<bb-m-labs> I'll give a shout when the build finishes
_whitelogger has quit [Excess Flood]
_whitelogger has joined #m-labs
<bb-m-labs> build forced [ETA 31m15s]
<bb-m-labs> I'll give a shout when the build finishes
<kyak> bb-m-labs: you are sure very chatty for someone consisting of 0's and 1's
<whitequark> bb-m-labs: dance
<bb-m-labs> <(^.^<)
<bb-m-labs> <(^.^)>
<bb-m-labs> (>^.^)>
<bb-m-labs> (7^.^)7
<bb-m-labs> (>^.^<)
<kyak> --)
<bb-m-labs> Hey! build artiq-kc705-nist_qc1 #169 is complete: Success [build successful]
<kyak> cheerful, too
<GitHub59> [misoc] sbourdeauducq pushed 1 new commit to master: https://git.io/v29tQ
<GitHub59> misoc/master 8984a7b Sebastien Bourdeauducq: gpio/GPIOTristate: fix for more than 1 signal
<sb0> bb-m-labs, force build artiq-kc705-nist_qc2
<bb-m-labs> The build has been queued, I'll give a shout when it starts
<bb-m-labs> Hey! build artiq-pipistrello-nist_qc1 #156 is complete: Success [build successful]
<bb-m-labs> build forced [ETA 17m25s]
<bb-m-labs> I'll give a shout when the build finishes
<bb-m-labs> build #153 of artiq-kc705-nist_qc2 is complete: Failure [failed conda_build] Build details are at http://buildbot.m-labs.hk/builders/artiq-kc705-nist_qc2/builds/153
evil_spirit has quit [Ping timeout: 240 seconds]
<sb0> bb-m-labs, force build artiq-kc705-nist_qc2
<bb-m-labs> build forced [ETA 17m25s]
<bb-m-labs> I'll give a shout when the build finishes
<bb-m-labs> build #154 of artiq-kc705-nist_qc2 is complete: Failure [failed conda_build] Build details are at http://buildbot.m-labs.hk/builders/artiq-kc705-nist_qc2/builds/154
key2 has quit [Ping timeout: 250 seconds]
_whitelogger has quit [Excess Flood]
_whitelogger has joined #m-labs
<GitHub166> [misoc] sbourdeauducq pushed 1 new commit to master: https://git.io/v298Q
<GitHub166> misoc/master 3ac69f3 Sebastien Bourdeauducq: gpio/GPIOTristate: workaround migen slice corner case
<sb0> bb-m-labs, force build artiq-kc705-nist_qc2
<bb-m-labs> build forced [ETA 17m25s]
<bb-m-labs> I'll give a shout when the build finishes
<bb-m-labs> build #155 of artiq-kc705-nist_qc2 is complete: Success [build successful] Build details are at http://buildbot.m-labs.hk/builders/artiq-kc705-nist_qc2/builds/155
mazzoo__ has quit [Ping timeout: 250 seconds]
mazzoo has joined #m-labs
_whitelogger has quit [Ping timeout: 260 seconds]
sb0 has quit [Quit: Leaving]
_whitelogger has joined #m-labs
key2 has joined #m-labs
sb0 has joined #m-labs
ylamarre has joined #m-labs
FabM has quit [Quit: ChatZilla 0.9.92 [Firefox 44.0.2/20160210153822]]
_whitelogger has quit [Ping timeout: 260 seconds]
_whitelogger has joined #m-labs
rohitksingh has joined #m-labs
_whitelogger has quit [Excess Flood]
_whitelogger has joined #m-labs
rohitksingh has quit [Ping timeout: 264 seconds]
<rjo> whitequark: this latent polymorphism can be very surprising. http://paste.debian.net/411452/ both have very different outputs.
<sb0> whitequark, what should be the return type of a C function which is used as a "-> TBool" syscall? int?
<rjo> ... the usage of TBool arguments would suggest that.
<rjo> whitequark: and also is it correct that we tend to force argument types of kernels by giving default values to the arguments?
ylamarre has quit [Remote host closed the connection]
ylamarre has joined #m-labs
ylamarre has quit [Read error: Connection reset by peer]
key2 has quit [Ping timeout: 260 seconds]
_whitelogger has quit [Excess Flood]
_whitelogger has joined #m-labs
<rjo> sb0: we need to start a bigger discussion on how kernels (more specifically coredevice runtime rtio api methods) should affect the timeline. we have on() off() with zero delay, pulse() that leave the timeline _after_ the pulse, dds.set() that is zero-delay, leaves the time "at" the set but affects the past hoping that there is nothing there. Now spi comes where at a device agnostic level you can only leave it either zero-delay or after the transaction is compl
<rjo> etc etc. i have a few notes on this. will send it to the mailing list.
_whitelogger has quit [Ping timeout: 260 seconds]
_whitelogger_ has joined #m-labs
_whitelogger_ has quit [Excess Flood]
_whitelogger has joined #m-labs
_whitelogger has quit [Excess Flood]
_whitelogger has joined #m-labs
_whitelogger has quit [Excess Flood]
_whitelogger has joined #m-labs
<GitHub29> [artiq] jordens pushed 2 new commits to master: https://git.io/v2Qpu
<GitHub29> artiq/master dc6d116 Robert Jordens: spi: have write() delay by transfer duration
<GitHub29> artiq/master 669fbaa Robert Jordens: ad53xx->ad5360 and refactor
<GitHub180> [artiq] jordens pushed 1 new commit to master: https://git.io/v2Qhk
<GitHub180> artiq/master 7ff0c89 Robert Jordens: kc705.clock: add all spi buses
<rjo> whitequark: i killed two flterms of yours. they looked stale.