ChanServ changed the topic of #linux-rockchip to: Rockchip development discussion | IRC log http://irclog.whitequark.org/linux-rockchip | Community GH https://github.com/linux-rockchip | Rockchip GH https://github.com/rockchip-linux | ML https://groups.google.com/group/linux-rockchip
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<Cruft> Does anyone know when the 3588 is coming out
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<Ke> no, but it was supposed to be about now, with the "event" I'd guess around the end of the year
<Cruft> Do you know if OEMs already have it?
<Ke> I don't know anything, but I'd believe yes
<Ke> as far as I know this sort of integration work is largely being done by google, which kind of acts as oem here, but isn't
<Cruft> Thats sort of what i'm getting at. Getting antsy for a new RK chromebook
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<Ke> I think most people here are looking forward to rk3588
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<robmur01> followup on the recent CNX post suggests 3588 is unlikely to be in general availability until next year
<maz> boo
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<Ke> robmur01: is it based on some fact?
<Ke> not saying my guess is any better, just interested if it has some info I don't
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<nomis> robmur01: have you ever encountered an inverted activity led on the ethernet port?
<robmur01> that's pretty much a "yes by definition" - IME no two ethernet devices have a consistent way of encoding link state vs. activity via LEDs anyway :P
<robmur01> I think my new hub actually uses "default on and blink off" vs. "default off and blink on" to reflect 1000M vs. 100M
<nomis> robmur01: ah, ok. Then I won't care about that for now.
<robmur01> *switch
<nomis> Just weird to have a led there with no cable plugged in...
<robmur01> first last and only time I bought a hub was, gulp, 20 years ago now
<robmur01> sometimes if the LEDs are driven automatically off the phy the behaviour can be tweaked; if they're GPIOs then obviously you can play with active-high/active-low and maybe the triggers too
<nomis> I could decouple the LED from the phy and then see if there is a matching trigger.
<robmur01> is your box using an external gigabit phy or the SoC-internal 100M one?
<nomis> robmur01: I'd guess the internal one. The device tree refers to it as ethernet@ff550000
<nomis> compatible = "rockchip,rk3328-gmac"
<nomis> this block refers to the LEDs via pinmux setup, specifically fephyled-rxm1, which sets the RK_PD1 pin to the alternate function 2.
<robmur01> well, the two MACs are identical, but ff55 is indeed the one wired to the internal phy
<nomis> (i.e. not a plain GPIO)
<robmur01> yeah, the link and data LEDs look to be functions of GPIO2_D0 and GPIO2_D1 respectively
<tuxd3v> robmur01, 4GB DDR4...doesn't cut mustard, we are expecting 8GB now
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<robmur01> tuxd3v: 8GB in a router? Just how big are your NAT tables? :P
<tuxd3v> WEl I was expecting it not in a router :)
<tuxd3v> WEl -> Well
<robmur01> but yeah, I hope RK start actually supporting a >32-bit memory map
<JPEW> Does anyone know about the TLB on the rockchip processors (RK3399 and RK3288)?
<robmur01> nomis: so I guess you can either claim both functions via pinctrl and let the phy do its thing, or use them in GPIO mode to do whatever you want :)
<robmur01> JPEW: by "the TLB" do you mean the CPU MMUs?
<JPEW> robmur01: Yes
<JPEW> Specifically how it handles huge pages
<nomis> robmur01: yeah, I'll keep it as is for now. Not really worth the bother.
<robmur01> JPEW: well, for starters there are lots of them ;) http://infocenter.arm.com/help/topic/com.arm.doc.ddi0500j/BIIJFHJD.html
<JPEW> robmur01: Right :) Specifically, I've noticed a case where using transparent huge pages is significantly slower for a memory copy when a huge page is involved
<JPEW> robmur01: with transparent huge pages "always": perf bench mem memcpy -s 1GB -> 2.947983 GB/sec
<JPEW> robmur01: transparent huge pages set to "advise": perf bench mem memcpy -s 1GB -> 7.272463 GB/sec
<robmur01> certainly quite a few of our cores can't hold 2MB entries in the closest level of TLB, so in theory if you have really good locality then 4K might in principle lead to quicker hits
<robmur01> try using `perf stat` to compare TLB and pagetable related events
<JPEW> robmur01: Sorry, I'm new to 'perf stat'. I tried 'perf stat -d perf bench mem memcpy -s 1GB'. The only apparently interesting stat is L1-dcache-loads. madvise = 611.001 M/sec, always = 367.896 M/sec
<robmur01> yeah, you probably want to target some specific events (via `-e ...`) - see `perf list` for what's available
<robmur01> also try to avoid doing it on RK3399 because perf on big.LITTLE is a bloody nightmare ;)
<JPEW> heh, I usually just disable one set of cores when profiling
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<ElBarto> Hello
<ElBarto> is it ok to talk about mainline u-boot here ?
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<robmur01> ElBarto: it's been known to happen ;)
<ElBarto> cool :)
<ElBarto> so, with u-boot 2019.10 I see weird memory issues
<ElBarto> so I've applied this series https://patchwork.ozlabs.org/project/uboot/list/?series=134525 back then
<ElBarto> and everything seems to work
<ElBarto> but it looks like that since the rk3328 sdram driver was merged with the px30 one the issue reappears
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<ElBarto> and I don't really know how all this works
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<robmur01> me neither, and the DRAM drivers look a bit too complex to make guesses about. FWIW my (LPDDR3) 3328 box has had 2020.01-rc4 on it since whenever that was and has been fine, so whatever's up must be fairly board-dependent
<ElBarto> mhm no it seems that the changes are their in the phy_px30 driver so it's something else ...
<ElBarto> I'm using rock64 fyi
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<inode> ElBarto: what kind of memory issues do you experience?
<ElBarto> inode: weird panics in FreeBSD when accessing some memory (it's always different)
<ElBarto> I don't see those with v2019.10+series=134525 and mainline atf v2.1
<inode> i had some issues with another board and incorrect dram bank size calculation since changes introduced in november last year (https://github.com/u-boot/u-boot/commits/master/arch/arm/mach-rockchip/sdram.c)
<inode> perhaps the sdram changes broke something else for your board
<ElBarto> sdram seems to be correctly detected for me
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<inode> sorry, ignore that file - the problem started before that :)
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<JPEW> robmur01: Well, I've got some stats from perf, but it doesn't appear to be slow for the reasons I'm expecting
<JPEW> robmur01: https://pastebin.com/qMeHP1Zc seems to imply that huge pages cause more cache misses
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<robmur01> JPEW: curious indeed... not sure what to make of the ~25% increase in instruction count :/ Just kicked off a rebuild of my board's kernel with THP enabled to see if I can repro
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<robmur01> yeesh, 2h40 to build the full distro package
<robmur01> I really should set up a chroot on my work machine that would do it in about 5m...
<robmur01> anyway, on the A72s here I see 8.12GB/s vs 3.19GB/s
<robmur01> ~100x fewer page faults as expected, but nearly double the instruction count
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<robmur01> this might be something we care about from the general arm64 kernel perspective, so I'll try digging a bit deeper
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