azonenberg changed the topic of #homecmos to: Homebrew CMOS and MEMS foundry design | Wiki: http://homecmos.drawersteak.com/wiki/Main_Page | Repository: http://code.google.com/p/homecmos/ | Logs: http://en.qi-hardware.com/homecmos-logs/
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<_Sync__> meh
<_Sync__> tempering my diodes killed them :/
<SpeedEvil> Were they working before?
<_Sync__> let me plot some data
<_Sync__> 30 s 350 °C kills the diodes ):
<_Sync__> also the 50µ one sucked
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<SpeedEvil> Nice!
<SpeedEvil> (well - not the whole death thing)
<SpeedEvil> Is current reflected around the y Axis, or do I not understand semiconductor physcise enough?
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<_Sync__> y axis is abs(log(I))
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<SpeedEvil> ah
<_Sync__> heating them made fancy resistors out of them :/
<_Sync__> :D
<SpeedEvil> i assume without heating they'd have become rapidly unstable?
<_Sync__> probably not
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<azonenberg> _Sync__: What are these?
<azonenberg> curve trace plots of homebrewed diodes?
<azonenberg> So I'm gonna be tinkering with flip-chip BGA packaging soonish
<azonenberg> Just an inert package, no active devices
<azonenberg> I'm gonna take a 4" wafer with thermal oxide on it, evaporate Cr adhesion layer followed by Cu metallization
<azonenberg> Coat photoresist as oxidation/particle barrier
<azonenberg> Score and cleave to dice
<azonenberg> Go for like 5mm or so dies
<azonenberg> maybe 10mm even
<azonenberg> Then for each die, strip the temporary photoresist off
<azonenberg> Coat new resist, contact litho for the metallization pattern
<azonenberg> Develop and etch with HCl:H2O2
<azonenberg> Now I have a metallized die with bond pads and some wires connecting bond pads to each other on a silicon substrate that is electrically isolated from the metal
<azonenberg> Then coat spin-on glass, bake, coat photoresist, contact litho for pad etch pattern
<ai6ci> muriatic+peroxide ftw.
<ai6ci> ;)
<azonenberg> HF etch to open windows in the overglass
<azonenberg> Then put a tiny dab of flux and a solder ball on each pad and reflow
<azonenberg> Now i have a flip-chip BGA
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<azonenberg> just waiting to have a bit more spare cash to make this happen
<azonenberg> ai6ci: What do you think of the process? Seem plausible?
<azonenberg> It seems like it would be a lot easier than wirebonding
<ai6ci> We talked about it last night already.
<ai6ci> <= usnavi
<azonenberg> oh, ok
<azonenberg> Anyway i just was browsing a few places looking for some ideas
<azonenberg> and materials
<azonenberg> Thinking of this http://www.mtixtl.com/SI-SO-Ba100D05C1-1000nm.aspx as a substrate
<ai6ci> Yea, well did you kind of jump start your interest in this recently, cause you seem like ur about to do it :)
<azonenberg> I was the original creator of the channel
<azonenberg> but i've been away from it for a while
<ai6ci> I know that too, but I meant this specific fab
<azonenberg> oh
<azonenberg> i'm graduating in a few months and will be losing my access to the evaporator
<ai6ci> Yesterday it seemed like an idea you had but not something you were going to be doing in 2 weeks or so.
<azonenberg> So i want to do whatever processing requires it soonish
<ai6ci> you also mentioned just building an evap :)
<azonenberg> get a bunch of metallized substrates and then do litho testing in my spare time as I find it
<azonenberg> And well, that is on the long-term roadmap
<azonenberg> But I'm trying to take advantage of resources I have available when I can
<ai6ci> yea def.
<azonenberg> So the plan is to get one or two of those oxide-coated 4" wafers, evaporate metal stack onto them
<azonenberg> Cleave a piece off and look at it under the SEM to characterize layer thicknesses
<azonenberg> and otherwise leave them sitting in a cassette until I have more spare time
<azonenberg> i figure if i photoresist-coat the wafer right after metallizing that should keep it relatively safe
<azonenberg> from oxidation I mean
<ai6ci> oshpark for small hobby SMT type boards with SOIC probably the cheapest?
<azonenberg> for low volume of small pcbs, yes
<ai6ci> I've never used them for stuff like that I home etch, but I want to try it.
<azonenberg> once your board gets more than 100x150mm or so, a "real" fab might be worth it
<azonenberg> Or if you need more layers etc
<ai6ci> eurocard is like 100mm x 160mm, i think halfsies are 100mm x 80mm
<ai6ci> hmm
<ai6ci> ill have to price it out then
<ai6ci> might work better and less hassle.
<azonenberg> ai6ci: They work in english units
<azonenberg> for 2-layer boards, 3 pcbs, $5 per square inch
<azonenberg> 4-layer is $10 per square inch
<ai6ci> Yea well I work in my head in english units but PCB stuff I have lots of reference and intuition.
<azonenberg> I have a eurocard rack but so far have not made a full-depth one
<ai6ci> ( for meters and the like ) :)
<azonenberg> Most of my boards have been faceplate connectors plus DC barrel jacks on the back
<azonenberg> So depth is irrelevant
<ai6ci> what faceplate connector do you use?
<azonenberg> RJ45 typically, for ethernet
<azonenberg> Or USB
<azonenberg> It depends on what the board does
<azonenberg> also http://www.desertsilicon.com/product-category/spin-on-glass/ looks like they might be a good replacement for Emulsitone
<azonenberg> now that emulsitone is discontinuing a lot of their nice products
<_Sync__> azonenberg: yes
<azonenberg> _Sync__: What was the process like?
<azonenberg> ai6ci: My TDR is currently the largest board i've ever designed
<azonenberg> it's just short of full depth eurocard
<azonenberg> 100 x 140
<_Sync__> those are made on (100) Si, 4", 0.5Ohmsq Boron
<_Sync__> first was 750nm wet oxide
<_Sync__> litho
<_Sync__> 15nm anti channeling oxide
<_Sync__> 40keV As implant
<_Sync__> front/back metal
<_Sync__> measure
<_Sync__> 10^15N/cm² dose
<azonenberg> _Sync__: Ion implant? Is this a homebrewed setup or do you have access to "real" gear?
<azonenberg> also these are through-wafer diodes?
<_Sync__> basically
<azonenberg> Not planar?
<_Sync__> 525µ thickness
<azonenberg> I'm used to diodes made on an IC with a P-well inside an N-well
<azonenberg> or vice versa
<azonenberg> Why do you need litho at all for a through-die diode?
<_Sync__> because you want to structure the fieldoxide and the front metal
<_Sync__> otherwise you have one huge diode
<_Sync__> which is not very useful at all
<azonenberg> I thought that's what you were doing
<azonenberg> like a discrete diode
<azonenberg> Not entirely clear on what you're trying to make
<_Sync__> I made some diodes
<azonenberg> So several independent diodes on one substrate?
<_Sync__> with 1000-50µm feature size
<_Sync__> yes
<azonenberg> But with vertical current flow
<_Sync__> about 10k of them
<_Sync__> yes
<azonenberg> through the wafer
<_Sync__> yes
<azonenberg> ah, ok
<_Sync__> and yeah I worked with real stuff
<_Sync__> but most of the process was drawn out of my ass
<azonenberg> What was the point of making diodes?
<_Sync__> seeing if they work
<azonenberg> As in, what was the experimental part?
<azonenberg> Was it to familiarize yourself with the equipment?
<_Sync__> we have some process control issues
<_Sync__> and making diodes is easy
<azonenberg> Ah, ok
<azonenberg> So ths goal was to characterize the implants?
<_Sync__> nope, mostly the RTA stage
<azonenberg> I'm less familiar with the FEOL stuff
<_Sync__> which as you can see killed the poor diodes
<azonenberg> Which is why I plan to build a BEOL first
<azonenberg> inert devices that consist of metallization (potentially multi-level eventually) on top of field oxide
<azonenberg> with a flip chip bga package
<_Sync__> yeah that's easy to do
<azonenberg> And use that to get litho working reliably
<azonenberg> I dont have to worry about trace metals etc for the BEOL too
<_Sync__> yup
<azonenberg> As far as FEOL i was thinking of doing the following
<azonenberg> Spincoat spin-on glass
<_Sync__> I still don't know what killed the diodes, I suppose Al spiking
<azonenberg> Litho for areas I want doped
<azonenberg> HF etch windows
<azonenberg> Spincoat dopant
<azonenberg> Diffusion bake
<azonenberg> then strip
<_Sync__> eh, yeah
<azonenberg> As far as isolation I'm wondering about how hard it would be to do STI
<_Sync__> hm yeah
<_Sync__> depending on how planar you want to be afterwards, easy or shitty
<azonenberg> alternatively, if i want to cheat a little bit
<_Sync__> because you'd need to do CMP
<azonenberg> Yeah I would
<azonenberg> I have an idea to chea
<azonenberg> Use SOI
<azonenberg> cheat*
<azonenberg> Use SOI and then etch with TMAH all the way through the upper silicon layer
<_Sync__> if you want to spend the money for thin top Si SOI wafers
<azonenberg> Such that each transistor is completely isolated from the rest
<azonenberg> The goal, I think, would be to make functional devices first
<azonenberg> Then to cut costs
<azonenberg> I dont expect to be processing full wafers either
<azonenberg> Buy like a 6" wafer and pre-dice into 1cm dies
<azonenberg> then do all of my processing in the center of one of those dies
<azonenberg> One at a time
<azonenberg> Heck, i could pull a Jeri and use a CPU fan as a spin coater :
<azonenberg> :p *
<_Sync__> no.
<_Sync__> :D
<_Sync__> you can just buy a used one on ebay
<_Sync__> you are also lucky because there are proper mask aligners all around
<azonenberg> That takes up more lab space
<azonenberg> And yes, I'm aware
<_Sync__> although getting one to work sucks ass
<_Sync__> ours is misaligned
<_Sync__> the upper wafer half is basically unusable
<azonenberg> The short term plan is to do whatever I can do quickly before graduating
<azonenberg> Things like making wafers with various stacks of metallization for future litho testing
<azonenberg> Then move across the country, get settled into my new job, spend a year or two doing planning and stuff while saving for a house
<azonenberg> Then once I have a place to build a proper lab, well...
<azonenberg> Build a proper lab :p
<azonenberg> too bad i dont have either the cash or a place to put it
<azonenberg> this looks quite nice and the price is, while not great, not terrible
<_Sync__> it's pretty steep for one that doesn't even feature joysticks
<_Sync__> but that might in the end be better because there are no electronics to go wrong
<azonenberg> i've seen a very similar one in use
<azonenberg> i want one that is simple
<azonenberg> Most on ebay that I see are >20K
<azonenberg> I dont have that kind of cash, but it looks less pricey than much of the competition
<_Sync__> we have a karl süss MA
<_Sync__> pretty nice thing
<_Sync__> especially because it has the microscope over the wafer station
<_Sync__> so nothing moves when you expose
<azonenberg> the OAI we have at RPI has a track with the microscope and exposure head sliding over a fixed wafer+mask stage
<_Sync__> yeah I guess that works for research
<azonenberg> Yeah, it's meant for one-off prototype runs
<_Sync__> we sometimes do 50 wafers in a run
<azonenberg> this is at IMEC? Or am I forgetting
<_Sync__> so a production one makes sense
<_Sync__> wat
<_Sync__> I'm not in belgium
<azonenberg> i'm losing track of who's where
<azonenberg> i thought someone here was at IMEC
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<_Sync__> gah
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