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nmz787_i>
azonenberg: are those BGA-type/socket pins? or some silicon-level grid?
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SpeedEvil>
These are silicon level I think
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SpeedEvil>
they're wafer-level images - before packaging
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SpeedEvil>
they're disvussing testing before the die is encapsulater or bonded out
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SpeedEvil>
making direct contact to the pads with probes
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nmz787_i>
so those pins
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nmz787_i>
so those 'pins' would seat onto some socket with pogo-pin like things?
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nmz787_i>
i.e. spring-loaded recepticles for each pin
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SpeedEvil>
The tester is a bed-of-nails tester with pogo-like pins, though
_much_ smaller
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nmz787_i>
cool, thanks!
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nmz787_i>
24:14 seems like a better view maybe
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azonenberg>
nmz787_i: C4 arrays? Those are flip-chip bumps