<Montjoie>
arg I need DMA to mainline for my driver
<oliv3r>
Montjoie: i well
<Montjoie>
oliv3r, you said nobody works to mainline DMA ?
* Montjoie
is going mad, with waitqueue in my crypto driver, cryptsetup benchmark show me x3 perf gain, but in the mean time my benchmarj show me /3 perf gain...
2013-12-03
<Montjoie>
My last major problem is about DMA, I dont understand the config values "wait clock cycle" and "data block size"
<wens>
Montjoie: look forward to it
<Montjoie>
wens, I will send it to the mailing list soon, I just need to clean it
<wens>
Montjoie: interested
<Montjoie>
wens, you want info about the crypto module ?
<Turl>
wens: montjoie[home]
<hno>
montjoie[home], yes there is some great feedback for an HWRNG there.
<montjoie[home]>
7 children, what a great HWRNG
2013-12-01
<montjoie[home]>
same question for source/destination data block size of DMA
<montjoie[home]>
Hello I seek for someone knowing exactly what means "wait clock cycle" for DMA engine of A20 (A20 User manual page 170)
2013-11-22
<Montjoie>
oliv3r, sorry for the only twice, perhaps some tweak could up that
<Montjoie>
so for testing I got only cryptodev for the moment
<Montjoie>
but I hit some bugs with AF_ALG under the sunxi3.4
<Montjoie>
rz2k, at your choice, since SS use the kernel crypto you can use af_alg or cryptodev
<Montjoie>
Lot of value are magic and need to be benched
<oliv3r>
Montjoie: only twice? :(
<rz2k>
Montjoie: noob question: does it need cryptodev engine for openssl to be usable from user-space?
<Montjoie>
My last bench with DMA was SS is twice faster as kernel generic AES
<Montjoie>
yes it use the kernel crypto infrastructure
<oliv3r>
Montjoie: did you do the PRNG too?
<oliv3r>
Montjoie: how does it perform compared to neon? much faster?
<arokux>
Montjoie: are you now using the in-kernel infrastructure?
<Montjoie>
size of debug in driver 50%minimum, time to clean...
<oliv3r>
Montjoie: nicely done :)
<arokux>
Montjoie: congrats!!
<Montjoie>
oh my god, I finaly found the last bug blocking the use of dm-crypt with the cryptodriver, hurrah
2013-11-15
<Montjoie>
it seems simple
<Montjoie>
yes, see tegra_aes_get_random() in drivers/crypto/tegra-aes.c
<Montjoie>
no, for prng it is just an ioread
<arokux>
Montjoie: how is that done? do you need to implement some library that can be use by the other software then?
<Montjoie>
I just need to track done some random DMA timeout
<Montjoie>
I have finished SHA1 MD5 and AES, I will release shortly the current stage and them do PRNG DES 3DES
<wens>
Montjoie: maybe you can do PRNG first?
<Montjoie>
hardware cryptographic helper
<Montjoie>
Security System
<Montjoie>
DMA
<arokux>
Montjoie: montjoie[home] what should be added to mainline so that SS works there?
<Montjoie>
arokux, you can delete the page
<arokux2>
Montjoie: montjoie[home] : otherwise, I'd like to delete them.
<arokux2>
Montjoie: montjoie[home] : you do not need those testing results on my page?
2013-11-14
<Montjoie>
torbenh3, good question, I need to compare
<arokux>
torbenh3: no idea. I've just tested something for Montjoie
<torbenh3>
Montjoie: how much performance did you gain, by using cryptodev over af_alg ?
<arokux>
Montjoie: I see.
<Montjoie>
for a real answer, I dont know
<arokux>
Montjoie: :$
<Montjoie>
arokux, cryptodev comes from BSD, troll begining
<arokux>
Montjoie: hm.. why? it is faster you say..
<Montjoie>
I dont think so
<arokux>
Montjoie: is cryptodev going to be merged to mainline?
<Montjoie>
for openssl with either you could
<Montjoie>
I have success only with af_alg for that
<arokux>
Montjoie: you wanted to say with either of those?
<Montjoie>
with both, you could logically give hw acceleration to openssl
<Montjoie>
cryptodev is a patch
<Montjoie>
af_lag is official in kernel
<Montjoie>
with cryptodev you r/w /dev/crypto
<Montjoie>
with af_alg you use a spetial socket/networking for using crypto
<arokux>
Montjoie: so af_alg is deprecated or superseded?
<Montjoie>
let userspace accessing kernel crypto
<Montjoie>
but it is the same goal
<Montjoie>
cryptodev is faster
<arokux>
Montjoie: how cryptodev and of af_alg compare?
<Montjoie>
too happy for waiting it
<arokux>
Montjoie: I see :)
<Montjoie>
bench not finished:)
<arokux>
Montjoie: where are the last blue and yellow bars?
<Montjoie>
now I need to finish my bench fo be sure to not have hidden bug
<arokux>
Montjoie: use gnuplot!
<Montjoie>
I have difficulty wit openoffice graph
<Montjoie>
yes log scaled
<arokux>
Montjoie: so y is log scaled?
<Montjoie>
20/10
<Montjoie>
for having tha gain, and excuse me it is -100, example without 10req/s with SS 20req/s the gain is 10/20*100-100 = 100% of gain
<arokux>
Montjoie: why "+100"?
<Montjoie>
oups blue/red*100 +100
<arokux>
Montjoie: why "+"?
<Montjoie>
blue/red + 100
<arokux>
Montjoie: yellow is blue/red * 100%?
<Montjoie>
after 512 bytes, powaaa
<Montjoie>
below 512bytes no gain
<Montjoie>
the size of request in bytes
<arokux>
Montjoie: what is on x axis?
<Montjoie>
no, I use cryptodev now instead of af_alg
<arokux2>
montjoie[home]: now I'll test you hackery
<montjoie[home]>
If someone know what exactly means the last value of sunxi_dma_config, I will love it (what means data block size...)
<mnemoc>
montjoie[home]: ok. I'll wait for your v2
<montjoie[home]>
mnemoc dont appy it, I think I dont have resend the version with ioremap
<arokux2>
Montjoie is here
<arokux>
pfdm: montjoie patch isn't a bug fix, so it is not that critical.
<pfdm>
arokux: No I don't have a repo, but it's nothing special. Let me verify. What is not merged yet, is montjoie patch for axp209 temperature sensors.
<Montjoie>
On x86_64 3.10.17 the bug is not here
<arokux>
Montjoie: I want to see it working, that is why i help!
<Montjoie>
this bug is blocking all my progress on the security system
<Montjoie>
I want to be sure that it is not myself the problem:)
<arokux>
Montjoie: ok!
<Montjoie>
you can test
<arokux>
Montjoie: do you want me to test sun4i or you know it won't work?
<Montjoie>
arokux, I have only a cubieboard2, no other board
<arokux>
Montjoie: ok. will sun4i also do? sun7i - I'll test on cubietruck.
<Montjoie>
hello, I have perhaps hit a bug in sunxi-3.4, does someone with CRYPTO_USER_API want to test my poc http://pastebin.com/33MKW7R9?
2013-11-07
<montjoie[home]>
tomorow comes the bench
* apo
gives montjoie[home] 40 cookies
<apo>
montjoie[home]: :D
<montjoie[home]>
its alive!! its alive, DMA finaly work for AES
<Montjoie>
hello, does someone here, is experienced with BIDRECTIONNAL DMA ?
<apo>
montjoie[home]: Gotta go fast! --Sonic
<montjoie[home]>
and good news AES support is near finished, I will could release soon
<montjoie[home]>
I see more and more people wanting the driver for the security system, I need to hurry to finish it:)
2013-11-06
<Turl>
Montjoie is working on one, you may want to check the status with him
<apo>
montjoie[home] seems to know something about the hardware crypto. :D
2013-10-30
<Montjoie>
I will clean it and send it on mailing list soon
<kenny>
Montjoie: well I look forward to trying it out down the road. Please keep posting updates.
<Montjoie>
For the moment no, I got some strange lockout when I bench it
<kenny>
Montjoie: nice. Is there a repo I can watch for commits?
<Montjoie>
yeah I got DMA working for the crypto module
<Montjoie>
when I have finished the SS module, I will very-document it non-DMA aware people
<Montjoie>
oups some word missing
<Montjoie>
with DMA, the destination is where you send data ? DMA documentation said the for SS the destination but for the TX IO but the SS doc said the data is sended to the RX IO
<Montjoie>
Now I need to find what value to send for SS
<Montjoie>
thanks hno
<hno>
Montjoie, which gives DDMA_PARA_REG in the manual, page 170.
<Montjoie>
I see nothing about that in the memory mapping section of the manual
<Montjoie>
so somethin is writed at 0x7f077f07
<Montjoie>
but after I saw *(u32 *)parg =
<Montjoie>
I am on sun7i
<hno>
Montjoie, and only on sun7i..
<Montjoie>
sended then to dma_ctrl() (arch/arm/mach-sun7i/dma/dma_core.c)
<Montjoie>
as a void *parg
<Montjoie>
oh, it is the address of this number sent
<hno>
Montjoie, does not look like addresses to me.
<Montjoie>
seems to be a harcoded address
<Montjoie>
if someone know what is the means of DMA parameter 0x7f077f07 for nand and 0x03030303 for emac...
<Montjoie>
I speak for sunxi-3.4
<oliv3r>
Montjoie: dma, especially in mainline, hasn't been touchedy et
<Montjoie>
I have question about sunxi_dma_config(), anyone know it ?
2013-10-26
<Turl>
montjoie[home]: nice :)
<oliv3r>
montjoie[home]: you workingo n a mainline driver? or just 3.4 for now?
<kenny>
montjoie[home]++ I'm looking forward to the faster crypto
<montjoie[home]>
yeah I finaly got A20 crypto hardware better than default kernel implementation
2013-10-25
<montjoie[home]>
welcome to ifdef land
<Turl>
montjoie[home]: there is a dma_compat.h header to support all sunx dma I think
<Turl>
montjoie[home]: check in arch/arm/mach-sun7i
<montjoie[home]>
ok, I could temporarly copy paste the same data
<Turl>
montjoie[home]: I think hansg got DMA going on 3.4 for sun7i
<montjoie[home]>
I see all allwinner A1x DMA stuff declared in arch/arm/plat-sunxi/include/plat/dma_defs.h but only ofr SUN4I and SUN5I, is it normal that I see nothing for SUN7I ?
<montjoie[home]>
ok thanks
<Turl>
montjoie[home]: I'm pretty sure there is a test dma module in kernel
<montjoie[home]>
anyone experienced with DMA know a good code example for using it ?
2013-10-24
<montjoie[home]>
hramrach I think the problem is the non-dma transfer
<Turl>
montjoie[home]: hi :)
<hramrach>
montjoie[home]: try to figure out what clock it uses ;-)
<montjoie[home]>
benching A20 crypto hardware, SHA1 digest performance halved with it... something is bad
<montjoie[home]>
thanks oliv3r
<oliv3r>
montjoie[home]: i think i pushed my first mainline compatible changes to my personal git, or as a seperate branch to the sunxi git
<oliv3r>
montjoie[home]: you need to do make LOADADDR=0x40008000 CROSS_COMPILE....
<montjoie[home]>
hello, with mainline kernel (3.12-rc6) for cubieboard2, should I still use make uImage for building kernel ? with that I got some errors with LOADADDR. could someone also share his .config ?
2013-10-20
<montjoie[home]>
need it for cryptoluks
<montjoie[home]>
it is my high final priority
<montjoie[home]>
I need it
<montjoie[home]>
yes
<montjoie[home]>
currently benching it
<montjoie[home]>
sha1 and md5 is working
<montjoie[home]>
yes
<Turl>
aep: Montjoie is working on it
2013-10-17
<Turl>
oliv3r: yeah I was, but I wasn't making active progress so I let Montjoie continue :)
<oliv3r>
Montjoie: yep
<Montjoie>
oliv3r, with serial console, you means using an UART cable ?
<Montjoie>
oliv3r, I have see with turl for the driver
<oliv3r>
Montjoie: fi your hacking on the kernel, serial console is more or less a must
<oliv3r>
Montjoie: if you don't see kernel dump; then you can't really debug it
<Montjoie>
I work by ssh and I cannot see the jerneldump
<Montjoie>
the driver
<Montjoie>
Hello i have writed the driver for the SS crypto hardware module of SoC A20, and I have random crash (sometimes later after modprobe) does someone want to see it/test it?
2013-10-11
<Montjoie>
I will wait for him
<Montjoie>
but his code wont work
<Montjoie>
I know, I have see that with him, I taked his code for a base
<oliv3r>
Montjoie: turl has done the clock and is doing the security module
<Montjoie>
hello, anybody experienced with clock ? I try to get running clock for the security module but clock rate still set to 1 Hz
2013-10-09
<oliv3r>
Montjoie: turl is
<Montjoie>
does someone know if someone is working on a driver for SS (Security System) of the A20, does it is a sort of hardware crypto accelerator ?
<Turl_>
Montjoie: if you want to test bleeding edge mainline with unmerged patches use sunxi-devel branch on linux-sunxi
<Turl_>
Montjoie: if you want to do technical review subscribe to linux-arm mailing list
<mnemoc>
Montjoie: ----^
<Montjoie>
I have few time for test, but I can review patch, but if I cannot find/see its..
<oliv3r>
Montjoie: well as I said, turl tries to compile patches that where sent to the mailing lists, but haven't been merged yet
<Montjoie>
oliv3r, it could be cool to have a direct way of testing/reviewing current patch status
<oliv3r>
Montjoie: wip is wherever developers keep them; i know turl has a 'dev' branch on linux-sunxi
<Montjoie>
n01, what driver need to be mainlined in priority ?
<Montjoie>
I know that mainlining is the goal, but for the moment I have too few time
<Montjoie>
which source do you think its better to use ?
<Montjoie>
because it is the one I found in lots of doc
<Montjoie>
latest sunxi 3.4
<n01>
Montjoie: which kernel are you using?
<Montjoie>
I dont understand, yesterday hwclock fail forever, and now for getting the error output and show it, it works...
<n01>
Montjoie: try to uso the driver I sent on ml. It is not mainlined but it works
<Montjoie>
oups yes rtc oliv3r
<oliv3r>
Montjoie: and i think it sould work just fine
<oliv3r>
Montjoie: rtc* :)
<Montjoie>
helllo hwclock fail to run on cubieboard2 (A20) does I need to use any other rtp driver sent on the mailing list for that ?
<Montjoie>
Does the mali gpu have some public datasheet available ?
2013-10-07
<n01>
montjoie[home]: I have to fix that
<montjoie[home]>
for example
<montjoie[home]>
so no watchdog for cubieboard2
<montjoie[home]>
the SUNXI_WDT depends on ARCH_SUN4I || ARCH_SUN5I
<montjoie[home]>
it is what I think for IOMEM
<oliv3r>
Montjoie: even if they could they really shouldn't
<Montjoie>
Does someone know if two driver can claim the same IOMEM or IRQ at the same time ?
<Montjoie>
The real great question is the calibration of temperature output
<Montjoie>
oliv3r, if it is confirmed, I will rename cleanly all functions
<oliv3r>
Montjoie: your driver seems okay for 3.4 (!TOUCHSCREEN_SUN4I_TS i mean) i'll try to look it later; also it should work for A10 equally, so don't make it sound like it's a A20 only thing
<Montjoie>
thanks oliv3r I will send my current driver anyway:)
<oliv3r>
Montjoie: tomorrow i'll give you details :p
<oliv3r>
Montjoie: no i do not :( I'm waiting for mnemoc to push lichee-3.4 to his github ;)
<Montjoie>
hello oliv3r, do you have news about sunxi-temperature.c ?
<Montjoie>
thanks
<HeHoPMaJIeH>
Montjoie: resistive touch panel
<Montjoie>
hello, what does exactly means RTP for the touch screen of A20, R... Touch Panel ?
2013-10-03
<oliv3r>
montjoie[home]: :D
<montjoie[home]>
yeah A20 TP hwmon temperature driver is working
<slapin_>
Montjoie: sending to both won't harm anybody's feeling, I think. And patches are tasty.
<Montjoie>
does I need for a patch to send to both ?
<Montjoie>
Hello what is the difference between linux-sunxi@googlegroups.com and dev@linux-sunxi.org ?
<Montjoie>
hello wingrime, I dont understand your remark on the y/m option of Kconfig, all AXP stuff are bool only
2013-10-02
<montjoie[home]>
The finger tip reduce the TP value from 1884 to 1874
<montjoie[home]>
Since A20 datasheet and manual dont speak about it, I think the pdf I read is for something else
<oliv3r>
Montjoie: bma250 is a popular G-sensor; its not installed by default anywhere
<Montjoie>
wired via i2c
<Montjoie>
present on a20_pad_std_v1_1.pdf
<Montjoie>
On the A20 datasheet I see the presence of the gsensor BMA250, does someone could confirme its presence ?
<Montjoie>
thanks for the finger tip ssvb , I will try it after work
<Montjoie>
lol
<mnemoc>
Montjoie: can you get an IR temp gun and find the relation?
<ssvb>
Montjoie: if the thermal sensors in a20 do not behave in a similar way, then they are probably not measuring the correct a20 temperature
<ssvb>
Montjoie: I'm not a big expert in this stuff, but in my experiments with exynos4210 and cpuburn, if I touched the chip with my finger, the temperature reported by the thermal sensor was instantly dropping by 10C or so
<Montjoie>
yes I know, I hope to find some info for that
<jemk>
Montjoie: to get a the right conversion you would have to measure at least two different known temperatures. the "/ 10" could be pretty right, but the offset could be different
<Montjoie>
The user manual is very bad
<jemk>
Montjoie: the diode voltage depends on temperature witch ~2mV/K
<Montjoie>
ok:)
<jemk>
Montjoie: that's a diode voltage, not a temperature
<Montjoie>
since it is a 12bits wide value, 4096 step of 0.1degrees is probable (like AXP209)
<Montjoie>
I have nothing
<Montjoie>
But the user manuel is empty about the conversion of the value
<Montjoie>
43.9°C
<Montjoie>
If it is the same conversion as the AXP209 it is (1885 - 1446) / 10 degrees
<Montjoie>
good question
<Montjoie>
ok, It could help because the sun4i-ts give me 1885 as temp value
<oliv3r>
Montjoie: tonight we'll have a proper driver that you can compare against
<Montjoie>
oliv3r, I got temperature from TP, but it is relative to something but what...
<oliv3r>
Montjoie: then you have to squash your commits :)
<Montjoie>
with git-send-email -x, all patch are sended one by one, I want a big merged one
<Montjoie>
I need to resend a better patch to the mailing list, how to send all patch since a commit as a single patch ?
<Montjoie>
I believed that there are another sensor different than TP
<oliv3r>
Montjoie: very strange place yes, but on the other hand, it's just a bunch of ADC's and you can use them as ADC if you wish to do so, so it's not entirly weird that the temperature diode is connected to one of those adc's :)
<oliv3r>
Montjoie: the touch panel has the temperature register inside it
<Montjoie>
because I found the doc about TP
<Montjoie>
ok thanks, but confirm that TP != internal sensor of A20 please
<oliv3r>
Montjoie: tonight we can link you sunxi-temperature.c
<oliv3r>
Montjoie: read the touch-panel section; same for a10 manual
<oliv3r>
Montjoie: check the usermanual of a20
<Montjoie>
Does someone have doc/datasheet about internal thermal sensor of A20, I found nothing.
<Montjoie>
or BMA250 according to a20_pad_std_v1_1.pdf
<oliv3r>
Montjoie: twi0 is connected to the axp by default