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2015-06-25 03:49 <sloantothebone_> Where do I get a ben nanonote?
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2015-06-25 06:31 <sloantothebone_> Hi
2015-06-25 06:31 <sloantothebone_> Anybody alive?
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2015-06-25 06:32 <sloantothebone_> k
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2015-06-25 08:34 <wpwrak> (ben) tricky. there are no new ones but maybe there's some 2nd hand to be had. maybe ask on the list if someone wants to sell theirs
2015-06-25 08:37 <eintopf> wpwrak: do you know the pandora? (not the box from the myth, the I suppose was designed to be a gaming console)
2015-06-25 08:37 <eintopf> I think it's a little bit bigger than ben, but maybe with some new hardware stuff (?runs little bit faster?)
2015-06-25 08:38 <eintopf> https://www.dragonbox.de/de/189-pandora-1ghz-megapack-consoles.html
2015-06-25 08:38 <eintopf> but _maybe_ not open hardware :-)
2015-06-25 08:40 <eintopf> oh well, they write that this machine can run PSX emulators. Yea maybe run, but it's more a diashow then
2015-06-25 08:43 <wpwrak> i "know" it in the sense that i know what it is, yes
2015-06-25 08:45 <wpwrak> could be a ben alternative, yes. not sure if anyone has used it as such. it's considerably larger, though (140.3 x 83.5 x 29.3 mm = 343 ccm vs. 99 x 75 x 17.5 = 130 ccm)
2015-06-25 08:48 <eintopf> wow
2015-06-25 08:48 <eintopf> much larger
2015-06-25 08:51 <eintopf> then better gaming on ben nanonote :-)
2015-06-25 08:52 <wpwrak> yeah :) alas, the pyra will be the same size
2015-06-25 08:53 <wpwrak> but they're cramming some more features into it
2015-06-25 08:54 <eintopf> yea, hdmi out
2015-06-25 08:58 <eintopf> when I was young, I always want to have some of the gamepark holdings handhelds, because it runs linux.
2015-06-25 08:58 <eintopf> so now there are many which runs linux and is mostly open hardware
2015-06-25 09:02 <pcercuei> have a look at the gcw zero
2015-06-25 09:02 <pcercuei> not really a ben alternative though
2015-06-25 09:02 <pcercuei> (no keyboard)
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2015-06-25 13:15 <DocScrutinizer05> eintopf: pandoras also are not available any longer (though a few will become available shortly since they produced the needed LCD cables for some existing devices with probably broken cables)
2015-06-25 13:16 <eintopf> just because some missing LCD cables?
2015-06-25 13:16 <eintopf> maybe I could also play some games with neo900 :-)
2015-06-25 13:56 <DocScrutinizer05> sure
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2015-06-25 14:46 <DocScrutinizer05> Finally! genuine snakeoil!! \o/  http://www.amazon.de/125ml-Natural-Schlangenöl-Haarwuchs-Haarausfall/dp/B00AFFM1TS
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2015-06-25 16:36 <sloantothebone_> Hi
2015-06-25 16:38 <paul_boddie> Hello!
2015-06-25 16:39 <paul_boddie> On the case of the missing jz4740 interrupts, I can enable them, they are pending (I can see #2 occur), but I still cannot clear ERL without a hang.
2015-06-25 16:40 <paul_boddie> Even though the handlers are installed in the right locations.
2015-06-25 16:40 <paul_boddie> Which I checked yesterday, as my loyal audience may remember.
2015-06-25 16:41 <paul_boddie> I'm suspecting that the CPU wants to load the ErrorEPC location and jump to it.
2015-06-25 16:44 <paul_boddie> sloantothebone_: I think IDA Systems were the last ones to have the NanoNote: http://www.idasystems.net/products/nanonote
2015-06-25 16:44 <paul_boddie> Pulster sold out eventually.
2015-06-25 17:02 <sloantothebone_> Oh
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2015-06-25 17:31 <sloantothebone_> Hi
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2015-06-25 21:54 <paul_boddie> Oh well, I guess it's all a mystery. Somehow Rockbox and Linux enable interrupts but I can't figure it out. :-(
2015-06-25 21:55 <paul_boddie> Quite how the CI20 bare metal guy gets interrupts working so easily is a mystery, too. Maybe the jz4780 is more sane or something.
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2015-06-25 22:18 <DocScrutinizer05> nah, your testbed is too complex
2015-06-25 22:18 <paul_boddie> Mine? Yes, probably. Being able to watch the CPU directly would be useful.
2015-06-25 22:18 <DocScrutinizer05> you probably got 5 bugs in it and each single one would break stuff
2015-06-25 22:19 <paul_boddie> Probably, yes. It's infuriating: I can run programs without interrupts just fine.
2015-06-25 22:19 <paul_boddie> I can even see interrupts pending but not serviced because of the status register state.
2015-06-25 22:20 <DocScrutinizer05> start with something absolutely simple: an empty IRQ routine that simply returns. Then see if you can enable IRQs without stuff hanging
2015-06-25 22:20 <paul_boddie> I did that. A plain exception handler that is just "return from exception".
2015-06-25 22:21 <paul_boddie> Now you're going to ask me if it returned. ;-)
2015-06-25 22:21 <DocScrutinizer05> I'm going to ask you if it got called
2015-06-25 22:26 <DocScrutinizer05> I gather jz47xx has no embedded trace macrocell?
2015-06-25 22:26 <paul_boddie> Well, it is possible because my "foreground" program didn't continue after enabling exceptions/interrupts.
2015-06-25 22:26 <paul_boddie> But that could mean that the CPU jumped into the unknown.
2015-06-25 22:27 <DocScrutinizer05> it is also possible that turingknowswhat got called instead
2015-06-25 22:27 <DocScrutinizer05> either on invokation of IRQ handler or when returning from it
2015-06-25 22:29 <paul_boddie> Yes, I suspected the ErrorEPC value to be rogue, which it was, but setting it to a non-rogue value didn't seem to help.
2015-06-25 22:29 <DocScrutinizer05> so next step: have some decent tested debug code in your IRQ handler that tells you it got called
2015-06-25 22:29 <paul_boddie> I examined the instructions at the location the CPU is supposed to visit to invoke the handler, and they were all consistent with my program's disassembly.
2015-06-25 22:29 <DocScrutinizer05> when you know it gets called, try to find out about what it does on exit/return
2015-06-25 22:30 <DocScrutinizer05> examining instructions is useless since you don't know if the CPU jumps to them to start with
2015-06-25 22:31 <paul_boddie> Well, it rules out them being wrong, at least. ;-)
2015-06-25 22:32 <paul_boddie> But I am intrigued to know what the "bootstrap" handlers actually do.
2015-06-25 22:32 <DocScrutinizer05> iirc you have a register pointing to a jump table. An IRQ-N jumps to address $table-register +  N * 4 byte or sth. On that addr there should be an instruction that looks like JMP @irqhandler
2015-06-25 22:33 <DocScrutinizer05> these are already 3 things that could go haywire: the initialization of table-register, and the addr and the instructions at that addr, in jump table
2015-06-25 22:34 <paul_boddie> MIPS jumps to dedicated regions upon exception/interrupt. Depending on who you ask, having a table wasn't RISC enough.
2015-06-25 22:35 <paul_boddie> Can't remember where I read that, but it is the usual RISC-measuring exercise.
2015-06-25 22:35 <paul_boddie> It's possible that the CPU is not even making a decision about jumping to these places at all. That's what worries me.
2015-06-25 22:35 <DocScrutinizer05> anyway already setting up the IRQ so it *invokes* your handler is quite intricate
2015-06-25 22:36 <DocScrutinizer05> examining code bytes at some (arbitrary) addr doesn't help much
2015-06-25 22:38 <DocScrutinizer05> the CPU usually doesn't _stop_ execution, it just continues fetching opcodes and executing them. The question is *where from*
2015-06-25 22:39 <paul_boddie> Well, it looks as if it fetches them from a particular address upon reset.
2015-06-25 23:05 <paul_boddie> Well, thanks for the hints! May give this a rest, though.
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