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2014-07-28 00:52 <wpwrak> hmm. the FLL works a specified. with quite precisely the -558 ppm error they designed in. if they had been a little bit more reckless, it could run with +125 ppm. well, i can detune the crystal to still make it work, but ...
2014-07-28 01:19 <DocScrutinizer05> I wonder what for you need such precision in system clock
2014-07-28 01:21 <DocScrutinizer05> ok, on 2GHz it's already 500kHz
2014-07-28 01:21 <DocScrutinizer05> err 1MHz
2014-07-28 01:37 <wpwrak> for USB. USB is picky.
2014-07-28 01:37 <wpwrak> and it's also nice to have a decent RTC
2014-07-28 01:38 <wpwrak> though i can correct any constant error there by software,
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2014-07-28 02:05 <DocScrutinizer05> exactly
2014-07-28 02:06 <DocScrutinizer05> anyway I doubt you want to use a sysclock based RTC
2014-07-28 02:07 <DocScrutinizer05> prolly way too greedy to do the CMOS clock
2014-07-28 02:07 <DocScrutinizer05> there's a lot of reasons why all such RTC use a true 32kHz crystal
2014-07-28 02:08 <wpwrak> i am using a 32 kHz crystal :)
2014-07-28 02:08 <wpwrak> the FLL then generates a 48 MHz clock from it
2014-07-28 02:09 <wpwrak> but if i have to detune the 32 kHz clock to get the 48 MHz right, then i also get incorrect RTC readings, so i'll have to correct these "back"
2014-07-28 02:31 pabspabspabs is now known as pabs3
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2014-07-28 04:29 <wpwrak> hmm, wrestled the beast down to 504 uA "suspended". that's about 500 uA more than i'd like to see ... i wonder who is stealing all that power. still haven't equipped all the components, so the number of suspects is small ...
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2014-07-28 05:34 <wpwrak> grmbl. qi-hw servers down again :-( i wonder what's killing them so often ... moribund hardware ? "visitors" ? the global conspiracy of ddos'ing script kiddies ?
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2014-07-28 05:40 <wpwrak> wolfspraul: thanks ! ;-)
2014-07-28 05:40 <wolfspraul> I need to move to a new physical machine though
2014-07-28 05:41 <wolfspraul> It's only stable for minutes now - enough...
2014-07-28 05:41 <wpwrak> wolfspraul: btw, /srv/www/downloads.qi-hardware.com seem to fail mounting quite regularly. i wonder if setting it to bg may help
2014-07-28 05:41 <wpwrak> oh, so the hw is dying
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2014-07-28 07:46 <kyak> must.. resist... moving... to cloud.. :)
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2014-07-28 13:54 <wpwrak> hmm .... <discussion@lists.en.qi-hardware.com>... Deferred: Connection timed out with turandot.qi-hardware.com.
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2014-07-28 14:04 <larsc> pcercuei: I was informed that you haven't signed up for the christmas party yet
2014-07-28 14:05 <pcercuei> hmm yes
2014-07-28 14:08 <wolfspraul> wpwrak: I'm setting up a new machine
2014-07-28 14:11 <larsc> pcercuei: is that a "Yes I'll be there"?
2014-07-28 14:13 <pcercuei> yes
2014-07-28 14:20 <wpwrak> wolfspraul: great :) thanks !
2014-07-28 14:41 <DocScrutinizer05> wolfspraul: elcos gone dry and popped up?
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2014-07-28 14:42 <DocScrutinizer05> (the usual fatal failure pattern of old PC boards)
2014-07-28 14:42 <DocScrutinizer05> except when fan gets stuck and whole PC overheats
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2014-07-28 17:02 <pcercuei> what possibilities do I have to debug a kernel which won't start at all?
2014-07-28 17:03 <larsc> jtag!
2014-07-28 17:04 <pcercuei> I don't have jtag, unfortunately
2014-07-28 17:08 <pcercuei> anything that can be used on serial? KGDB?
2014-07-28 17:08 <pcercuei> from what I can see KGDB can be used on a running kernel, not to debug a kernel that fails to boot
2014-07-28 17:34 <larsc> strategically placed gpio toggles
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2014-07-28 18:51 <DocScrutinizer05> exactly. Use the LEDs or whatever you got, to signal checkpoints your code reaches
2014-07-28 18:52 <DocScrutinizer05> [2014-07-28 Mon 01:48:37] <wpwrak> well, in a bit, i'll make my code return that register value. then i'll know for sure what's cooking there. for now, all i have is a lone LED :)
2014-07-28 18:53 <DocScrutinizer05> [2014-07-28 Mon 01:49:41] <whitequark> hook a scope there - then shift it out
2014-07-28 18:53 <whitequark> so, somewhat relevant
2014-07-28 18:54 <DocScrutinizer05> very convenient: a piezo beeper
2014-07-28 18:54 <whitequark> I found an old ar9285 wifi card
2014-07-28 18:54 <whitequark> and turns out it has JTAG and UART pins on the sides, and open-source firmware for a very close device in same family, and the host interface allows to arbitrarily dump RAM
2014-07-28 18:55 <whitequark> I want to run something there
2014-07-28 18:56 <whitequark> 96k SRAM, 1M of architectural SPI (i.e. SoC-integrated) flash
2014-07-28 18:56 <whitequark> and if I understand it correctly, ar9k (PHY+MAC) series is basically the same IP core as their earlier ar5k (PHY) series and some CPU with a PCI interface that twiddles it
2014-07-28 18:57 <whitequark> so that FOSS firmware just contains a port of mac80211 stack (!)
2014-07-28 18:57 <DocScrutinizer05> sounds about correct
2014-07-28 18:58 <whitequark> only problem is, i have no idea how to program the PCI-e interface
2014-07-28 18:58 <whitequark> no FOSS drivers, firmware or even docs exist that mention PCI or PCI-e host iface
2014-07-28 18:58 <DocScrutinizer05> umm, on card side?
2014-07-28 18:58 <whitequark> yes
2014-07-28 18:59 <DocScrutinizer05> yeah, prolly pretty unusual platform for FOSS
2014-07-28 18:59 <whitequark> it doesn't make it easier that they use some incredibly obscure CPU architecture I've never even heard of
2014-07-28 18:59 <whitequark> tensilica
2014-07-28 18:59 <whitequark> *tensilica xtensa
2014-07-28 19:00 <DocScrutinizer05> errr
2014-07-28 19:00 <whitequark> apparently it is synthesizable and customizable, and tailored for DSP
2014-07-28 19:00 <whitequark> but I've seen prcisely 0 DSP operations in FOSS firmware
2014-07-28 19:00 <whitequark> which makes me wonder, why not just put a cortex-m there or at least keep using SH-2, as they used to
2014-07-28 19:00 <DocScrutinizer05> first two google hits: https://en.wikipedia.org/wiki/Tensilica  http://ip.cadence.com/ipportfolio/tensilica-ip/xtensa-customizable
2014-07-28 19:01 <whitequark> yes, sure, I found it already
2014-07-28 19:01 <whitequark> but I never heard of it before, which is unusual
2014-07-28 19:01 <whitequark> because I've heard of most CPU architectures :p
2014-07-28 19:02 <whitequark> the host-side driver is weird, too
2014-07-28 19:02 <whitequark> it -appears- like the PCI-e transceiver has some kind of a huge shift register somewhere, and you can shift a configuration there?
2014-07-28 19:02 <DocScrutinizer05> that's a meta CPU
2014-07-28 19:02 <DocScrutinizer05> kinda like ARM
2014-07-28 19:03 <whitequark> *nod*
2014-07-28 19:03 <DocScrutinizer05> >>synthesizable and customizable<< as you said
2014-07-28 19:04 <whitequark> oh, wait, I just realized what does that PCI-e related code do
2014-07-28 19:05 <whitequark> it writes *through* PCI-e *into* the registers on the device-side to configure *device-side* serdes
2014-07-28 19:05 <whitequark> http://lxr.free-electrons.com/source/drivers/net/wireless/ath/ath9k/ar9002_hw.c#L195
2014-07-28 19:07 <whitequark> I wonder what PCI-e IP cores are popular in industry, maybe it's not a custom one
2014-07-28 19:07 <DocScrutinizer05> 288 bit serial shift register - eeeew
2014-07-28 19:07 <whitequark> exactly
2014-07-28 19:09 <DocScrutinizer05> http://ip.cadence.com/ipportfolio/interface-ip
2014-07-28 19:10 <DocScrutinizer05> http://ip.cadence.com/ipportfolio/interface-ip/pci-express-ip
2014-07-28 19:13 <DocScrutinizer05> dunno if you seen it, or whether it's worth anything: http://www.linux-xtensa.org/
2014-07-28 19:13 <whitequark> so they want me to register, but their registration page resets the connection
2014-07-28 19:13 <whitequark> awesome
2014-07-28 19:15 <whitequark> hmmm, linux-xtensa may have device-side PCI-e
2014-07-28 19:16 <DocScrutinizer05> that's what I thought
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2014-07-28 19:21 <whitequark> no, only has host-side PCI
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2014-07-28 19:32 <whitequark> well, I'll just hope that either UART debug output gives some hints, or it's something simple like a shared memory buffer
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2014-07-28 19:36 <whitequark> actuall, yes, it will be something like that, since PCI-e is more or less system bus extension
2014-07-28 19:37 <whitequark> so invariably, when I look at the BAR on the host, I view some kind of shared memory with the device
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