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2014-06-29 10:17 <whitequark> ARGH
2014-06-29 10:17 <whitequark> the busses in hamburg have no concept of route, I swear
2014-06-29 10:17 <whitequark> there are two stops for the same bus number near my hotel, and they go at least three different routes from there, dependent on, including but not limited to, odd/even, day of week and phase of moon
2014-06-29 10:18 <whitequark> I can't *read* the timetable, but the complexity in it rivals the diagrams in the x86 ISA manual
2014-06-29 10:19 * whitequark is now... somewhere in hamburg.
2014-06-29 10:24 <whitequark> well, at least hvv.de has a really amazing route planner
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2014-06-29 12:26 <whitequark> wow, yosys (http://www.clifford.at/yosys) is something truly amazing
2014-06-29 12:26 <whitequark> someone needs to combine it with werner's fpgatools for a fully FOSS FPGA toolchain...
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2014-06-29 13:21 <larsc> someone...
2014-06-29 13:22 <whitequark> well, if fpgatools source was actually comprehensible...
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2014-06-29 14:56 <wpwrak> whitequark: wolfgang's fpgatools :)
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2014-06-29 15:37 <whitequark> yes, yes, typoed
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2014-06-29 16:20 <DocScrutinizer05> oh, wolfgang engaged into FPGA?
2014-06-29 16:21 <DocScrutinizer05> not into chip making right away? ;-)
2014-06-29 16:21 <DocScrutinizer05> last I remember been him pondering to... make his own masks, dies, cpus... no? :-)
2014-06-29 16:23 <DocScrutinizer05> #s/cpus/WLAN chips/ ?
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2014-06-29 16:34 <whitequark> DocScrutinizer05: https://github.com/Wolfgang-Spraul/fpgatools
2014-06-29 16:34 <DocScrutinizer05> :)
2014-06-29 16:34 <whitequark> DocScrutinizer05: and you can actually use yosys+abc+qflow as a fully FOSS ASIC toolchain
2014-06-29 16:34 <whitequark> no fpga though yet
2014-06-29 16:35 <whitequark> but if someone implements PAR and bitstream gen, it's possible to actually generate the bitstream on an FPGA reconfugirung itself
2014-06-29 16:35 <DocScrutinizer05> errr, too much info
2014-06-29 16:37 <DocScrutinizer05> on a sidenote: I checked flights and railway Nue->HH->Nue a few days ago. Seems the only(!) difference is: flights go only 2 times a day, but are only 70 minutes
2014-06-29 16:38 <DocScrutinizer05> while train costs almost same but takes 7+h
2014-06-29 16:39 <DocScrutinizer05> now if you could smoke in train, I'd still ponder. But a 7h no-smoking vs 70min, that's a clear nobrainer.
2014-06-29 16:39 <DocScrutinizer05> anyway, obsolete topic, today
2014-06-29 16:44 <whitequark> yeah, I'm out in less than 24h
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2014-06-29 17:00 <larsc> train nue->hh is less than 6h
2014-06-29 17:00 <larsc> normally
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2014-06-29 21:21 <whitequark> I have four hours tomorrow to look at something in Hamburg
2014-06-29 21:21 <whitequark> ideas?
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2014-06-29 21:50 <apelete> larsc: I've been playing with preparing next data while dma is transfering current data
2014-06-29 21:52 <apelete> wrote a first version where I had jz4740_pre_request() and jz4740_post_request() callbacks, with jz4740_pre_request() relying on jz4740_pre_dma_transfer() function which only do dma_map_sg() while dma is trasnfering data
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2014-06-29 21:55 <apelete> didn't noticed any improvement so I tried doing dma_map_sg() + dmaengine_slave_config() + dmaengine_prep_slave_sg() all together in parallel
2014-06-29 21:56 <apelete> that last combination doesn't work yet, here's the patch I'm working on if you care to take a look;
2014-06-29 21:56 <apelete> http://paste.debian.net/107332/
2014-06-29 21:59 <apelete> I'm getting a kernel panic which comes from dmaengine_submit(desc); in jz4740_send_dma_request()
2014-06-29 22:00 <apelete> larsc: is it possible at all to do dmaengine_slave_config() + dmaengine_prep_slave_sg() in parallel ?
2014-06-29 22:01 <apelete> parallel = while dma is busy trasnferring current data
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