2013-10-22 00:07 dos1 has quit [Read error: Operation timed out]
2013-10-22 01:10 guanucoluis has joined #qi-hardware
2013-10-22 01:26 pcercuei has quit [Ping timeout: 246 seconds]
2013-10-22 01:55 guanucoluis has quit [Ping timeout: 248 seconds]
2013-10-22 02:51 guanucoluis has joined #qi-hardware
2013-10-22 02:54 woakas has quit [Ping timeout: 272 seconds]
2013-10-22 03:37 rz2k has joined #qi-hardware
2013-10-22 04:17 guanucoluis has quit [Ping timeout: 252 seconds]
2013-10-22 05:06 wolfspraul has joined #qi-hardware
2013-10-22 05:36 rz2k has quit []
2013-10-22 05:43 wej has quit [Ping timeout: 264 seconds]
2013-10-22 05:44 valhalla has quit [Ping timeout: 246 seconds]
2013-10-22 05:46 valhalla has joined #qi-hardware
2013-10-22 06:15 jekhor has joined #qi-hardware
2013-10-22 06:30 panda|x201 has joined #qi-hardware
2013-10-22 06:49 wej has joined #qi-hardware
2013-10-22 07:03 xiangfu has quit [Remote host closed the connection]
2013-10-22 09:17 dos1 has joined #qi-hardware
2013-10-22 09:22 lekernel has joined #qi-hardware
2013-10-22 09:24 dos1 has quit [Ping timeout: 260 seconds]
2013-10-22 10:36 xiangfu has joined #qi-hardware
2013-10-22 10:39 jekhor has quit [Ping timeout: 252 seconds]
2013-10-22 10:43 panda|x201 has quit [Ping timeout: 268 seconds]
2013-10-22 10:52 viric has quit [Remote host closed the connection]
2013-10-22 10:53 viric has joined #qi-hardware
2013-10-22 11:19 xiangfu has quit [Ping timeout: 252 seconds]
2013-10-22 11:20 xiangfu has joined #qi-hardware
2013-10-22 11:21 pcercuei has joined #qi-hardware
2013-10-22 11:45 porchao has joined #qi-hardware
2013-10-22 11:47 porchaso0 has quit [Read error: Connection reset by peer]
2013-10-22 12:47 pcercuei has quit [Ping timeout: 268 seconds]
2013-10-22 12:49 porchaso0 has joined #qi-hardware
2013-10-22 12:51 porchao has quit [Ping timeout: 272 seconds]
2013-10-22 13:45 jekhor has joined #qi-hardware
2013-10-22 13:59 FDCX_ has quit [Remote host closed the connection]
2013-10-22 14:01 jekhor has quit [Read error: Connection reset by peer]
2013-10-22 14:10 wej has quit [Quit: What!?]
2013-10-22 14:13 wej has joined #qi-hardware
2013-10-22 14:46 jekhor has joined #qi-hardware
2013-10-22 14:51 ffio has joined #qi-hardware
2013-10-22 15:13 ffio has quit [Quit: WeeChat 0.4.1]
2013-10-22 15:15 guanucoluis has joined #qi-hardware
2013-10-22 15:16 jekhor has quit [Ping timeout: 240 seconds]
2013-10-22 15:19 guanucoluis has quit [Ping timeout: 272 seconds]
2013-10-22 15:28 pcercuei has joined #qi-hardware
2013-10-22 15:37 kilae has joined #qi-hardware
2013-10-22 15:41 porchao has joined #qi-hardware
2013-10-22 15:43 porchaso0 has quit [Ping timeout: 245 seconds]
2013-10-22 15:44 pcercuei has quit [Ping timeout: 245 seconds]
2013-10-22 16:04 jekhor has joined #qi-hardware
2013-10-22 16:34 kristianpaul has joined #qi-hardware
2013-10-22 16:34 kristianpaul has joined #qi-hardware
2013-10-22 16:36 dos1 has joined #qi-hardware
2013-10-22 16:42 pcercuei has joined #qi-hardware
2013-10-22 18:09 pcercuei has quit [Ping timeout: 272 seconds]
2013-10-22 18:19 jekhor has quit [Ping timeout: 240 seconds]
2013-10-22 18:53 apelete has quit [Ping timeout: 245 seconds]
2013-10-22 19:28 wolfspraul has quit [Ping timeout: 245 seconds]
2013-10-22 19:32 <wpwrak> nice: developer gets approached by state spies who want to hire him, blogs about it: http://www.thoughtcrime.org/blog/saudi-surveillance/
2013-10-22 19:48 pcercuei has joined #qi-hardware
2013-10-22 19:49 <eintopf> wpwrak: hi :)
2013-10-22 19:51 jekhor has joined #qi-hardware
2013-10-22 19:56 <wpwrak> eintopf: heya ! you know how developers calculate time ... given an estimate of X, add one, them multiply by two, and convert to the next higher unit
2013-10-22 19:57 <wpwrak> eintopf: so if i say "i'll review it tomorrow", that really means in about four weeks :)
2013-10-22 19:57 <eintopf> it's ok
2013-10-22 19:57 <eintopf> i made now the "easy to review trivial cleanup patchstack"
2013-10-22 19:58 <eintopf> maybe you can review this
2013-10-22 19:58 <eintopf> then I add your Acked, Reviewed
2013-10-22 19:58 <eintopf> then netdev
2013-10-22 19:58 <eintopf> my internet is damn slow today
2013-10-22 20:09 kilae has quit [Quit: ChatZilla 0.9.90.1 [Firefox 24.0/20130910160258]]
2013-10-22 20:11 <eintopf> wpwrak: https://dl.dropboxusercontent.com/u/5815386/IMG_20131022_215934.jpg development setup, just ignore the dust :D
2013-10-22 20:11 <eintopf> first the contiki stick, then two of your atusb which controlled via qemu
2013-10-22 20:11 apelete has joined #qi-hardware
2013-10-22 20:12 wej_ has joined #qi-hardware
2013-10-22 20:12 <apelete> Hello there
2013-10-22 20:14 <kristianpaul> Hi :)
2013-10-22 20:15 wej has quit [Ping timeout: 264 seconds]
2013-10-22 20:15 <apelete> larsc mth: added some logging in ep_config_from_hw() in musb_core.c where the usb endpoints scanning happens -> http://paste.debian.net/60583/
2013-10-22 20:16 <apelete> kristianpaul: Hi :)
2013-10-22 20:17 <apelete> larsc mth: turns out the scanning is failing on the first musb_read_fifosize() call in there:
2013-10-22 20:17 <apelete> [    1.870000] musb-hdrc: epnums = 1 | musb_num_eps = 6
2013-10-22 20:17 <apelete> [    1.880000] musb_read_fifosize: musb_readb failed
2013-10-22 20:17 <apelete> [    1.890000] musb-hdrc: musb_read_fifosize failed
2013-10-22 20:17 <apelete> [    1.900000] musb-hdrc: missing bulk
2013-10-22 20:18 <apelete> musb_read_fifosize() in turn calls musb_readb(), which fails.
2013-10-22 20:20 <apelete> seems pretty bad since musb_readb() is trying to read hardware registers, if I'm not mistaken
2013-10-22 20:23 <apelete> larsc mth: is possible the something may be missing or badly declared in platform data for the registers not to be readable ?
2013-10-22 20:27 <mth> is the udc clock running?
2013-10-22 20:29 <apelete> how do I check that ?
2013-10-22 20:29 <mth> there is a register that contains the mask bits for all the clocks; printing the contents of that register should tell you whether it's enabled or not
2013-10-22 20:30 <mth> clock gate register iirc
2013-10-22 20:30 <apelete> ok, in the init function I'm doing:
2013-10-22 20:30 <apelete> clk = devm_clk_get(dev, "udc");
2013-10-22 20:30 <apelete> 	int ret = PTR_ERR(clk);
2013-10-22 20:30 <apelete> if (IS_ERR(clk)) {
2013-10-22 20:30 <apelete> 	dev_err(dev, "Failed to get clock: %d\n", ret);
2013-10-22 20:30 <apelete> 	return ret;
2013-10-22 20:30 <apelete> }
2013-10-22 20:31 <apelete> glue->clk = clk;
2013-10-22 20:31 <apelete> clk_enable(clk);
2013-10-22 20:31 <apelete> 
2013-10-22 20:31 <apelete> thought that was enough to get the clock running
2013-10-22 20:31 <apelete> will check the register you're talking about
2013-10-22 20:39 <mth> there was something about clk_enable being replaced in recent kernel versions
2013-10-22 20:39 <mth> larsc will know more about it
2013-10-22 20:39 <mth> I don't know if clk_enable won't work anymore or is just wrong in theory
2013-10-22 20:40 <mth> that fragment looks ok, but it's useful to double check, just in case the enable failed, the code gets executed in an unexpected order, something disabling the clock after it got enabled etc
2013-10-22 20:43 <apelete> ok, couldn't find out how to check clock gate register so will start by adding checks for clk_enable in case it fails during init
2013-10-22 21:09 <mth> simply casts its address to an unsigned int * and dereference that
2013-10-22 21:10 <mth> address being the virtual address of the register, which is 0xB.......
2013-10-22 21:10 <mth> physical address is 0x1......., add 0xA0000000 for kseg1
2013-10-22 21:15 <apelete> mth: not sure about what you're saying. should I cast the return value of devm_clk_get() ?
2013-10-22 21:16 <mth> no, the address from the programming manual, inside the musb endpoint scanning code
2013-10-22 21:17 <apelete> ha
2013-10-22 21:18 <apelete> ok, will look into the programming manual and try to do that from inside the musb endpoint scanning code
2013-10-22 21:26 porchaso0 has joined #qi-hardware
2013-10-22 21:26 <apelete> mth: found it:
2013-10-22 21:26 <apelete> The Clock Gate Register (CLKGR) is a 32-bit read/write register that controls the CLOCK GATE
2013-10-22 21:26 <apelete> function of peripherals. It is initialized to 0x00000000 by any reset.
2013-10-22 21:26 porchao has quit [Read error: Connection reset by peer]
2013-10-22 21:27 <apelete> the udc bit seems to be 11th bit according to programming manual
2013-10-22 21:33 porchaso0 has quit [Ping timeout: 265 seconds]
2013-10-22 21:38 pcercuei has quit [Ping timeout: 260 seconds]
2013-10-22 21:39 pcercuei has joined #qi-hardware
2013-10-22 21:49 pcercuei has quit [Ping timeout: 245 seconds]
2013-10-22 21:50 jekhor has quit [Ping timeout: 240 seconds]
2013-10-22 21:56 pcercuei has joined #qi-hardware
2013-10-22 22:05 <apelete> mth: ok now, I added the folloqing lines at the beginning of ep_config_from_hw():
2013-10-22 22:05 <apelete> u32 * clk_gate_reg = 0x10000020 + 0xA0000000;
2013-10-22 22:05 <apelete> pr_debug("%s: clk_gate_reg value is %x\n", musb_driver_name, &clk_gate_reg);
2013-10-22 22:05 <apelete> during boot I get:
2013-10-22 22:05 <apelete> [    1.940000] musb-hdrc: clk_gate_reg value is 81c25b18
2013-10-22 22:06 <apelete> according to programming manual, udc bit in gate clock register is 11th bit (counting from 0)
2013-10-22 22:08 <apelete> mth: if what I did seems correct to you, then 11th is set to 1 in hex number 81c25b18
2013-10-22 22:09 <apelete> mth: programming manual says:
2013-10-22 22:09 <apelete> 1: Only udc enters suspend mode, udc_hclk
2013-10-22 22:09 <apelete> 0: udc_hclk always running, don’t stop
2013-10-22 22:09 <apelete> has been stopped . if the bit is 1 and udc
2013-10-22 22:09 <apelete> doesn’t enters suspend mode, udc_hclk
2013-10-22 22:09 <apelete> always runs
2013-10-22 22:10 <apelete> mth: so I guess the clock is not running then, as you hinted. is this correct ?
2013-10-22 22:11 pcercuei has quit [Ping timeout: 272 seconds]
2013-10-22 22:12 pcercuei has joined #qi-hardware
2013-10-22 22:16 <mth> apelete: you're taking the address instead of dereferencing
2013-10-22 22:16 <mth> to be on the safe side, adding "volatile" to the type would be good, but if you read it only once that doesn't really matter
2013-10-22 22:17 <apelete> crap, didn't noticed I was writing & instead of * there...
2013-10-22 22:18 lekernel has quit [Quit: Leaving]
2013-10-22 22:27 <apelete> changing
2013-10-22 22:27 <apelete> pr_debug("%s: clk_gate_reg value is %x\n", musb_driver_name, &clk_gate_reg);
2013-10-22 22:27 <apelete> pr_debug("%s: clk_gate_reg value is %x\n", musb_driver_name, *clk_gate_reg);
2013-10-22 22:27 <apelete> to
2013-10-22 22:27 <apelete> I now get:
2013-10-22 22:27 <apelete> [    1.960000] musb-hdrc: clk_gate_reg value is eb58
2013-10-22 22:28 <apelete> mth: correct value now, 11th bit still set to 1 it seems
2013-10-22 22:28 <mth> 11th bit or bit 11?
2013-10-22 22:28 <mth> (since bit 11 is the 12th bit from right)
2013-10-22 22:28 <apelete> bit 11, sorry
2013-10-22 22:29 <apelete> bit 11 indeed, counting from 0 it's the 12th bit :-)
2013-10-22 22:31 <apelete> programming manual says: Bit -> 11, Module -> UDC, Descrption -> "0: udc_hclk always running, don’t stop
2013-10-22 22:32 <apelete> 1: Only udc enters suspend mode, udc_hclk
2013-10-22 22:32 <apelete> has been stopped . if the bit is 1 and udc
2013-10-22 22:32 <apelete> doesn’t enters suspend mode, udc_hclk
2013-10-22 22:32 <mth> yes, it's different from the other clock gate bits
2013-10-22 22:32 <mth> so it being 1 might not be a problem, but you could try forcing it to 0 to see if that changes anything (just for testing)
2013-10-22 22:33 <mth> or print the sleep control reg
2013-10-22 22:45 <apelete> mth: here it is:
2013-10-22 22:45 <apelete> [    1.920000] musb-hdrc: sleep_control_reg value is 1540
2013-10-22 22:46 <apelete> manual says: Bits -> 15:8, Name -> 01ST, Description:
2013-10-22 22:46 <mth> ok, bit 6 is 1, so udc is not suspended
2013-10-22 22:47 <apelete> ok
2013-10-22 22:47 <apelete> so what do you think is going on then ?
2013-10-22 22:48 <mth> no idea; the clock being disabled was my best guess
2013-10-22 22:48 <mth> try looking inside the method that reports the read error, to see at what point it decides the read failed
2013-10-22 22:48 <mth> also check whether the old driver does any kind of endpoint scanning
2013-10-22 22:49 <mth> or if it doesn't, what addresses it uses to program endpoints
2013-10-22 22:49 <apelete> ok
2013-10-22 22:50 <apelete> mth: thanks for the help all along, that was very helpulf (and supportive) :)
2013-10-22 22:50 <mth> you're welcome
2013-10-22 22:53 <apelete> I might feel sleepy tomorrow at work (it's getting late here), but it was worth it. learned a few things tonight :)
2013-10-22 22:55 dos1 has quit [Ping timeout: 240 seconds]