18:32 <DocScrutinizer05> whitequark: idea about kicad ERC:

18:32 <DocScrutinizer05> [2016-07-12 Tue 19:42:38] <DocScrutinizer05> wpwrak: (ERC) I guess we could do a proof of concept resp rapid prototyping first approach based on netlists, where for each pin an associated rule (code) gets executed, with a list of properties of all other connected pins as parameter

18:32 <DocScrutinizer05> [2016-07-12 Tue 19:48:33] <DocScrutinizer05> while read property; do case $property in *INPUT* || *SIGNAL-IN*) ;; *) exit $ERROR;; esac; done

18:32 <DocScrutinizer05> [2016-07-12 Tue 19:51:18] <DocScrutinizer05> we could even define impedance matched lines as virtual components with special footprints (one trace) and no component, like this. Property "50OHM"

18:35 <whitequark> that sounds like a basic ERC, yes

18:42 <DocScrutinizer05> less basic than what we seem to have in kicad and eagle

18:43 <whitequark> you can quite easily do that in eagle with an ULP

18:43 <DocScrutinizer05> seems both only know a fixed limited number of net classes and predefined ultra-naive rules for those

18:43 <DocScrutinizer05> aah yes

18:44 <DocScrutinizer05> alas you can't assign properties to pins in eagle, afaik

18:44 <DocScrutinizer05> best case implicitly, or very explicitly in a coded list of pin names

18:45 <DocScrutinizer05> background: we now (need to) switch from eagle to kicad for Neo900

18:46 <DocScrutinizer05> eagle's ULP are nifty but crippled, in that you can't do *any* modifications to *any* objects

18:47 <DocScrutinizer05> that "exit $path/to/scropt.scp" is an abomination

18:48 <whitequark> hm, yeah, you can't assign any pin properties

18:48 <whitequark> and you can't even look within a part with a ULP

18:48 <whitequark> well, you can always read XML and do ERC on the XML schematics, right?

18:48 <DocScrutinizer05> this *might* have changed with most recent release

18:49 <DocScrutinizer05> right, that's a nice aspect of 'new' eagle project files: XML format